coreboot-kgpe-d16/src/mainboard/siemens
Mario Scheithauer 92e4ed1702 mb/siemens/{mc_apl1,...,mc_apl6}: Configure FSP-S UPDs
Until now some FSP-S parameters were configured for Siemens APL
mainboards via the Binary Configuration Tool (BCT). For simplification,
the original APL FSP binary should now be used. For this purpose, the
corresponding FSP-S parameters are set via devicetree, respectively via
mainboard_silicon_init_params accordingly.

The following parameters are affected:
- Disable CPU power states (C-states)
- Set lowest Max Pkg Cstate - PkgC0C1
- Disable PCIe Hot Plug for all enabled RPs
- Disable PCIe Transmitter Half Swing for all RPs
- Disable PCIe Active State Power Management (ASPM) for all RPs
- Disable PCIe L1 Substates for all RPs

TEST:
- Compare old with new coreboot log on mc_apl5, found no differences
- Boot Linux v4.4 and check output of 'lspci'

Change-Id: I5af627defd6426140cc9a74bb18db400a8971d72
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2021-01-20 12:26:42 +00:00
..
chili mb/siemens/chili: Rework Kconfig 2021-01-05 00:20:15 +00:00
mc_apl1 mb/siemens/{mc_apl1,...,mc_apl6}: Configure FSP-S UPDs 2021-01-20 12:26:42 +00:00
Kconfig mb/*/Kconfig: Factor out MAINBOARD_VENDOR 2020-03-03 10:15:22 +00:00
Kconfig.name