0867062412
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "i82801gx.h"
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#define RTC_FAILED (1 <<2)
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#define GEN_PMCON_3 0xa4
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static void check_cmos_failed(void)
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{
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u8 byte;
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byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
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if (byte & RTC_FAILED) {
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// clear bit 1 and bit 2
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byte = cmos_read(RTC_BOOT_BYTE);
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byte &= 0x0c;
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byte |= CONFIG_MAX_REBOOT_CNT << 4;
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cmos_write(byte, RTC_BOOT_BYTE);
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}
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}
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