coreboot-kgpe-d16/src
Duncan Laurie fd461e396b regscript: Add support for MSR type
This required changing value/mask types to uint64_t.

Another option would be to use id field to select low or high
32 bits of the MSR and set them independently.

BUG=chrome-os-partner:23505
BRANCH=none
TEST=build and boot on rambi

Change-Id: Ied9998058a8035bf3f003185236f3be3e0df7fc9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176304
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4951
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-06 17:19:57 +02:00
..
arch Move redundant Makefile rules from arch to top level. 2014-05-03 00:26:40 +02:00
console console: Fix UART selection prompt 2014-04-30 23:47:28 +02:00
cpu haswell: move to mp_init library 2014-05-05 23:38:22 +02:00
device device: Conditionally bypass oprom execution 2014-05-01 15:39:52 +02:00
drivers drivers/pc80/Kconfig: Do not init PS/2 keyboard if GRUB 2 is chosen as payload 2014-05-02 15:05:07 +02:00
ec Declare recovery and developer modes outside ChromeOS 2014-05-01 15:38:41 +02:00
include regscript: Add support for MSR type 2014-05-06 17:19:57 +02:00
lib regscript: Add support for MSR type 2014-05-06 17:19:57 +02:00
mainboard rambi: include the EC devices normally on superio 2014-05-06 17:19:19 +02:00
northbridge northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment 2014-05-06 13:55:39 +02:00
soc baytrail: include mainboard's superio.asl 2014-05-06 17:19:08 +02:00
southbridge AGESA SPI: Fix Kconfig options 2014-04-29 17:31:40 +02:00
superio superio/winbond/w83627thg: Remove w83627thg_enable_serial symbol 2014-05-02 09:44:58 +02:00
vendorcode Build without ChromeOS 2014-05-01 15:40:39 +02:00
Kconfig Declare recovery and developer modes outside ChromeOS 2014-05-01 15:38:41 +02:00