coreboot-kgpe-d16/src/soc/nvidia
Christian Walter 6d2dbe11ae tegra210: Increase size of verstage due to overflow
When imlpementing changes in VBOOT, within the build process, tegra210
overflows into the romstage. Reduce the size of romstage from 104 to
100 and increase the size from verstage from 66 to 70.

Change-Id: Ie00498838a644a6f92881db85833dd0a94b87f53
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34640
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-06 12:07:39 +00:00
..
tegra soc/nvidia: Use 'include <stdlib.h>' when appropriate 2019-07-25 16:06:32 +00:00
tegra124 soc/nvidia/tegra124: Assert divisor is non-zero 2019-07-29 06:01:42 +00:00
tegra210 tegra210: Increase size of verstage due to overflow 2019-08-06 12:07:39 +00:00
Kconfig