19ead962c4
The following ACPI features are supported: 1. S1, S4, S5 sleep and wake up (by power button). 2. Thermal configuration based on ADT7475. 3. HPET timer. 4. Interrupt routing based on ACPI table. Signed-off-by: Maggie Li <maggie.li@amd.com> Reviewed-by: Michael Xie <michael.xie@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
29 lines
670 B
Text
29 lines
670 B
Text
# This will make a target directory of ./VENDOR_MAINBOARD
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target VENDOR_MAINBOARD
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mainboard VENDOR/MAINBOARD
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option CC="CROSSCC"
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option CROSS_COMPILE="CROSS_PREFIX"
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option HOSTCC="CROSS_HOSTCC"
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__COMPRESSION__
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option ROM_SIZE=1024*1024
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_IMAGE_SIZE=0x20000
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option XIP_ROM_SIZE=0x20000
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option COREBOOT_EXTRA_VERSION=".0-normal"
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payload __PAYLOAD__
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end
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romimage "failover"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x20000
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option XIP_ROM_SIZE=0x20000
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option COREBOOT_EXTRA_VERSION=".0-failover"
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payload __PAYLOAD__
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end
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buildrom ./coreboot.rom ROM_SIZE "normal" "failover"
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