5ff6a6af0e
These are likely not properly set up and L1 is not even supported on the desktop variant of the southbridge. This fixes observed instability on some PCIe GPUs. Change-Id: I70d3536984342614a6ef04a45bc6591e358e3abe Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36576 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
72 lines
2.2 KiB
Text
72 lines
2.2 KiB
Text
#
|
|
# This file is part of the coreboot project.
|
|
#
|
|
# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
|
|
# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
|
|
#
|
|
# This program is free software; you can redistribute it and/or modify
|
|
# it under the terms of the GNU General Public License as published by
|
|
# the Free Software Foundation; version 2 of the License.
|
|
#
|
|
# This program is distributed in the hope that it will be useful,
|
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
# GNU General Public License for more details.
|
|
#
|
|
|
|
if BOARD_ASROCK_G41C_GS || BOARD_ASROCK_G41C_GS_R2_0 || \
|
|
BOARD_ASROCK_G41M_GS || BOARD_ASROCK_G41M_S3 || \
|
|
BOARD_ASROCK_G41M_VS3_R2_0
|
|
|
|
config BOARD_SPECIFIC_OPTIONS
|
|
def_bool y
|
|
select ARCH_X86
|
|
select CPU_INTEL_SOCKET_LGA775
|
|
select NORTHBRIDGE_INTEL_X4X
|
|
select SOUTHBRIDGE_INTEL_I82801GX
|
|
select SUPERIO_NUVOTON_NCT6776 if BOARD_ASROCK_G41C_GS_R2_0
|
|
select SUPERIO_WINBOND_W83627DHG if BOARD_ASROCK_G41C_GS \
|
|
|| BOARD_ASROCK_G41M_GS || BOARD_ASROCK_G41M_S3 \
|
|
|| BOARD_ASROCK_G41M_VS3_R2_0
|
|
select HAVE_ACPI_TABLES
|
|
select BOARD_ROMSIZE_KB_1024
|
|
select HAVE_OPTION_TABLE
|
|
select HAVE_CMOS_DEFAULT
|
|
select HAVE_ACPI_RESUME
|
|
select DRIVERS_I2C_CK505
|
|
select INTEL_GMA_HAVE_VBT
|
|
select MAINBOARD_HAS_LIBGFXINIT
|
|
|
|
config MAINBOARD_DIR
|
|
string
|
|
default "asrock/g41c-gs"
|
|
|
|
config VARIANT_DIR
|
|
string
|
|
default "g41c-gs-r2" if BOARD_ASROCK_G41C_GS_R2_0
|
|
default "g41c-gs" if BOARD_ASROCK_G41C_GS
|
|
default "g41m-gs" if BOARD_ASROCK_G41M_GS
|
|
default "g41m-s3" if BOARD_ASROCK_G41M_S3
|
|
default "g41m-vs3-r2" if BOARD_ASROCK_G41M_VS3_R2_0
|
|
|
|
config MAINBOARD_PART_NUMBER
|
|
string
|
|
default "G41C-GS R2.0" if BOARD_ASROCK_G41C_GS_R2_0
|
|
default "G41C-GS" if BOARD_ASROCK_G41C_GS
|
|
default "G41M-GS" if BOARD_ASROCK_G41M_GS
|
|
default "G41M-S3" if BOARD_ASROCK_G41M_S3
|
|
default "G41M-VS3 R2.0" if BOARD_ASROCK_G41M_VS3_R2_0
|
|
|
|
config DEVICETREE
|
|
string
|
|
default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
|
|
|
|
config MAX_CPUS
|
|
int
|
|
default 4
|
|
|
|
# Override the default variant behavior, since the data.vbt is the same
|
|
config INTEL_GMA_VBT_FILE
|
|
default "src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
|
|
|
endif # BOARD_ASROCK_G41*
|