196 lines
7.4 KiB
C
196 lines
7.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/dram/ddr2.h>
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#include <device/dram/ddr3.h>
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#include <dimm_info_util.h>
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#include <spd.h>
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#include <tests/test.h>
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#define MAX_ALLOWED_MODULE_TYPE 3
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static void test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type)
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{
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/* Non-ECC variants */
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assert_int_equal(MEMORY_BUS_WIDTH_64, smbios_bus_width_to_spd_width(ddr_type, 64, 64));
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assert_int_equal(MEMORY_BUS_WIDTH_32, smbios_bus_width_to_spd_width(ddr_type, 32, 32));
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assert_int_equal(MEMORY_BUS_WIDTH_16, smbios_bus_width_to_spd_width(ddr_type, 16, 16));
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assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 8, 8));
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/* Incorrect data width. Fallback to 8-bit */
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assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 15, 15));
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/* ECC variants */
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uint8_t extension_8bits = SPD_ECC_8BIT;
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if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5)
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extension_8bits = SPD_ECC_8BIT_LP5_DDR5;
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assert_int_equal(MEMORY_BUS_WIDTH_64 | extension_8bits,
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smbios_bus_width_to_spd_width(ddr_type, 64 + 8, 64));
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assert_int_equal(MEMORY_BUS_WIDTH_32 | extension_8bits,
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smbios_bus_width_to_spd_width(ddr_type, 32 + 8, 32));
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assert_int_equal(MEMORY_BUS_WIDTH_16 | extension_8bits,
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smbios_bus_width_to_spd_width(ddr_type, 16 + 8, 16));
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assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
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smbios_bus_width_to_spd_width(ddr_type, 8 + 8, 8));
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/* Incorrect data width. Fallback to 8-bit */
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assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits,
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smbios_bus_width_to_spd_width(ddr_type, 15 + 8, 15));
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}
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static void test_smbios_bus_width_to_spd_width(void **state)
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{
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smbios_memory_type memory_type[] = {
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MEMORY_TYPE_DDR2, MEMORY_TYPE_DDR3, MEMORY_TYPE_DDR4, MEMORY_TYPE_DDR5,
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MEMORY_TYPE_LPDDR3, MEMORY_TYPE_LPDDR4, MEMORY_TYPE_LPDDR5,
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};
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for (int i = 0; i < ARRAY_SIZE(memory_type); i++) {
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print_message("test_smbios_bus_width_to_spd_width_parametrized(%d)\n",
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memory_type[i]);
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test_smbios_bus_width_to_spd_width_parametrized(memory_type[i]);
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}
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}
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static void test_smbios_memory_size_to_mib(void **state)
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{
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uint32_t extended_size;
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uint16_t memory_size;
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/* Unknown memory size */
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assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0));
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assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0xFFFF));
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assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 87642));
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/* 32GiB - 1MiB */
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extended_size = 0;
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assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
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extended_size = 0xFFFFFFFF;
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assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
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extended_size = 0xDEDE6666;
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assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size));
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/* Memory size in KiB when MSB is flipped */
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memory_size = 0x0 & 0x8000; /* Zero bytes */
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assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0));
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assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
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assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 2345568));
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memory_size = (31 * KiB) | 0x8000;
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assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0));
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assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
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assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 72594344));
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/* Value in MiB Only when memory size is not 0xFFFF and 0x7FFF and MSB is not set */
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memory_size = 32766; /* value in MiB */
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assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0));
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assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF));
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assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735));
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}
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static void test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type)
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{
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const smbios_memory_form_factor undefined_factors[] = {
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MEMORY_FORMFACTOR_OTHER, MEMORY_FORMFACTOR_UNKNOWN,
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MEMORY_FORMFACTOR_SIMM, MEMORY_FORMFACTOR_SIP,
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MEMORY_FORMFACTOR_CHIP, MEMORY_FORMFACTOR_DIP,
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MEMORY_FORMFACTOR_ZIP, MEMORY_FORMFACTOR_PROPRIETARY_CARD,
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MEMORY_FORMFACTOR_TSOP, MEMORY_FORMFACTOR_ROC,
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MEMORY_FORMFACTOR_SRIMM, MEMORY_FORMFACTOR_FBDIMM,
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MEMORY_FORMFACTOR_DIE,
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};
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for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) {
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assert_int_equal(SPD_UNDEFINED, smbios_form_factor_to_spd_mod_type(
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memory_type, undefined_factors[i]));
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}
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}
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static void test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
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smbios_memory_type memory_type, const LargestIntegralType udimm_allowed[],
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const LargestIntegralType rdimm_allowed[], LargestIntegralType expected_module_type)
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{
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print_message("%s(%d)\n", __func__, memory_type);
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assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_DIMM),
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udimm_allowed, MAX_ALLOWED_MODULE_TYPE);
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assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_RIMM),
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rdimm_allowed, MAX_ALLOWED_MODULE_TYPE);
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assert_int_equal(expected_module_type, smbios_form_factor_to_spd_mod_type(
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memory_type, MEMORY_FORMFACTOR_SODIMM));
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test_smbios_form_factor_to_spd_mod_type_ddr(memory_type);
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}
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static void test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type)
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{
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print_message("%s(%d)\n", __func__, memory_type);
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/* Form factors defined in coreboot */
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assert_int_equal(LPX_SPD_NONDIMM, smbios_form_factor_to_spd_mod_type(
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memory_type, MEMORY_FORMFACTOR_ROC));
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}
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static void test_smbios_form_factor_to_spd_mod_type(void **state)
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{
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const struct smbios_form_factor_test_info_ddrx {
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smbios_memory_type memory_type;
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const LargestIntegralType udimm_allowed[MAX_ALLOWED_MODULE_TYPE];
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const LargestIntegralType rdimm_allowed[MAX_ALLOWED_MODULE_TYPE];
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LargestIntegralType expected_module_type;
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} ddrx_info[] = {
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{
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.memory_type = MEMORY_TYPE_DDR2,
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.udimm_allowed = {SPD_DDR2_DIMM_TYPE_UDIMM,
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SPD_DDR2_DIMM_TYPE_MICRO_DIMM,
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SPD_DDR2_DIMM_TYPE_MINI_UDIMM},
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.rdimm_allowed = {SPD_DDR2_DIMM_TYPE_RDIMM,
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SPD_DDR2_DIMM_TYPE_MINI_RDIMM},
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.expected_module_type = SPD_DDR2_DIMM_TYPE_SO_DIMM,
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},
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{
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.memory_type = MEMORY_TYPE_DDR3,
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.udimm_allowed = {SPD_DDR3_DIMM_TYPE_UDIMM,
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SPD_DDR3_DIMM_TYPE_MICRO_DIMM,
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SPD_DDR3_DIMM_TYPE_MINI_UDIMM},
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.rdimm_allowed = {SPD_DDR3_DIMM_TYPE_RDIMM,
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SPD_DDR3_DIMM_TYPE_MINI_RDIMM},
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.expected_module_type = SPD_DDR3_DIMM_TYPE_SO_DIMM,
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},
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{
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.memory_type = MEMORY_TYPE_DDR4,
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.udimm_allowed = {DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM},
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.rdimm_allowed = {DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM},
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.expected_module_type = DDR4_SPD_SODIMM,
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},
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{.memory_type = MEMORY_TYPE_DDR5,
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.udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM},
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.rdimm_allowed = {DDR5_SPD_RDIMM, DDR5_SPD_MINI_RDIMM},
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.expected_module_type = DDR5_SPD_SODIMM},
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};
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/* Test for DDRx DIMM Modules */
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for (int i = 0; i < ARRAY_SIZE(ddrx_info); i++)
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test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized(
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ddrx_info[i].memory_type, ddrx_info[i].udimm_allowed,
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ddrx_info[i].rdimm_allowed, ddrx_info[i].expected_module_type);
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smbios_memory_type lpddrx_memory_type[] = {
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MEMORY_TYPE_LPDDR3,
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MEMORY_TYPE_LPDDR4,
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MEMORY_TYPE_LPDDR5,
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};
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/* Test for Lpddrx DIMM Modules */
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for (int i = 0; i < ARRAY_SIZE(lpddrx_memory_type); i++)
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test_smbios_form_factor_to_spd_mod_type_lpddrx(lpddrx_memory_type[i]);
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}
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int main(void)
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{
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const struct CMUnitTest tests[] = {
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cmocka_unit_test(test_smbios_bus_width_to_spd_width),
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cmocka_unit_test(test_smbios_memory_size_to_mib),
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cmocka_unit_test(test_smbios_form_factor_to_spd_mod_type),
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};
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return cb_run_group_tests(tests, NULL, NULL);
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}
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