coreboot-kgpe-d16/src/soc/amd/stoneyridge/smi.c
Kyösti Mälkki c4fdb7b923 cpu/x86: Move some SMM function declarations
Change-Id: I9a4e57f8fd032f2824eab0e5b59d635710e3e24b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34822
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-08-13 13:59:34 +00:00

39 lines
1.2 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* Utilities for SMM setup
*/
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <amdblocks/acpimmio.h>
#include <soc/southbridge.h>
#include <soc/smi.h>
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
printk(BIOS_DEBUG, "%s STUB!!!\n", __func__);
}
/** Set the EOS bit and enable SMI generation from southbridge */
void enable_smi_generation(void)
{
uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
reg |= SMITRG0_EOS; /* Set EOS bit */
smi_write32(SMI_REG_SMITRIG0, reg);
}