coreboot-kgpe-d16/src/soc/amd/stoneyridge/uart.c
Marshall Dawson a5f225f288 soc/amd/stoneyridge: Check UART index
The Stoney Ridge APU has only two internal UARTs.  Add checks for
invalid settings.  When enabling the UART, return if the console is
on any UART not equal 0 or 1.  The base address returned is 0 if an
invalid configuration is used.  All callers check the return value
before using the returned value.  Finally, provide an assert at the
earliest availability of the console to get the notice into the
cbmem console.

BUG=b:62201567
TEST=Build with UART = -1, 0, 2.  Inspect objdump and boot to OS.
     Build without ST UART and inspect with objdump.

Change-Id: I9432571712bae15a604f4280ea5e0f81fd68604d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-16 00:12:48 +00:00

30 lines
860 B
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/uart.h>
#include <soc/southbridge.h>
uintptr_t uart_platform_base(int idx)
{
if (CONFIG_UART_FOR_CONSOLE < 0 || CONFIG_UART_FOR_CONSOLE > 1)
return 0;
return (uintptr_t)(APU_UART0_BASE + 0x2000 * (idx & 1));
}
unsigned int uart_platform_refclk(void)
{
return 48000000;
}