8677a23d5b
src/arch/x86. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
128 lines
2.8 KiB
Text
128 lines
2.8 KiB
Text
/*
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* Memory map:
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*
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* CONFIG_RAMBASE : text segment
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* : rodata segment
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* : data segment
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* : bss segment
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* : stack
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* : heap
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*/
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/*
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* Bootstrap code for the STPC Consumer
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* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
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*/
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/*
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* Written by Johan Rydberg, based on work by Daniel Kahlin.
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* Rewritten by Eric Biederman
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* 2005.12 yhlu add coreboot_ram cross the vga font buffer handling
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*/
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/* We use ELF as output format. So that we can debug the code in some form. */
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INCLUDE ldoptions
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ENTRY(_start)
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SECTIONS
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{
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. = CONFIG_RAMBASE;
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/* First we place the code and read only data (typically const declared).
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* This could theoretically be placed in rom.
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*/
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.text : {
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_text = .;
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*(.text);
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*(.text.*);
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. = ALIGN(16);
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_etext = .;
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}
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.rodata : {
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_rodata = .;
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. = ALIGN(4);
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console_drivers = .;
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*(.rodata.console_drivers)
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econsole_drivers = . ;
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. = ALIGN(4);
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pci_drivers = . ;
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*(.rodata.pci_driver)
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epci_drivers = . ;
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cpu_drivers = . ;
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*(.rodata.cpu_driver)
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ecpu_drivers = . ;
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*(.rodata)
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*(.rodata.*)
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/* kevinh/Ispiri - Added an align, because the objcopy tool
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* incorrectly converts sections that are not long word aligned.
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*/
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. = ALIGN(4);
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_erodata = .;
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}
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/* After the code we place initialized data (typically initialized
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* global variables). This gets copied into ram by startup code.
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* __data_start and __data_end shows where in ram this should be placed,
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* whereas __data_loadstart and __data_loadend shows where in rom to
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* copy from.
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*/
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.data : {
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_data = .;
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*(.data)
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_edata = .;
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}
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/* bss does not contain data, it is just a space that should be zero
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* initialized on startup. (typically uninitialized global variables)
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* crt0.S fills between _bss and _ebss with zeroes.
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*/
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_bss = .;
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.bss . : {
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*(.bss)
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*(.sbss)
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*(COMMON)
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}
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_ebss = .;
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_end = .;
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/* coreboot really "ends" here. Only heap and stack are placed after
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* this line.
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*/
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. = ALIGN(CONFIG_STACK_SIZE);
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_stack = .;
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.stack . : {
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/* Reserve a stack for each possible cpu */
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. += CONFIG_MAX_CPUS*CONFIG_STACK_SIZE;
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}
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_estack = .;
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_heap = .;
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.heap . : {
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/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
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. = CONFIG_HEAP_SIZE ;
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. = ALIGN(4);
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}
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_eheap = .;
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/* The ram segment. This includes all memory used by the memory
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* resident copy of coreboot, except the tables that are produced on
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* the fly, but including stack and heap.
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*/
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_ram_seg = _text;
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_eram_seg = _eheap;
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/* CONFIG_RAMTOP is the upper address of cached memory (among other
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* things). We must not exceed beyond that address, there be dragons.
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*/
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_bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP");
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/* Discard the sections we don't need/want */
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/DISCARD/ : {
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*(.comment)
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*(.note)
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*(.note.*)
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}
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}
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