coreboot-kgpe-d16/payloads/libpayload/drivers
Julius Werner 120aec0902 serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32
We have two drivers for a 100%-identical peripheral right now, mostly
because we couldn't come up with a good common name for it back when we
checked it in. That seems like a pretty silly reason in the long run.

Both Tegra and Rockchip SoCs contain UARTs that use the common 8250
register interface (at least for the very basic byte-per-byte transmit
and receive parts we care about), memory-mapped with a 32-bit register
stride. This patch combines them to a single 8250_mmio32 driver (which
also fixes a problem when booting Rockchip without serial enabled, since
that driver forgot to check for serial initialization when registering
its console drivers). The register accesses are done using readl/writel
(as Rockchip did before), since the registers are documented as 32-bit
length (with top 24 bits RAZ/WI), although the Tegra SoC doesn't enforce
APB accesses to have the full word length. Also fixed checkpatch stuff.

A day may come when we can also merge this driver into the (completely
different, with more complicated features and #ifdefs) 8250 driver for
x86 (which has MMIO support for 8-bit register stride only), both here
and in coreboot. But it is not this day. This day I just want to get rid
of a 99% identical file without expending too much effort.

BUG=None
TEST=Booted on Veyron_Pinky and Nyan_Blaze with and without serial
enabled, both worked fine (although Veyron has another kernel issue).

Change-Id: I85c004a75cc5aa7cb40098002d3e00a62c1c5f2d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e7959c19356d2922aa414866016540ad9ee2ffa8
Original-Change-Id: Ib84d00f52ff2c48398c75f77f6a245e658ffdeb9
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225102
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9387
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10 07:50:21 +02:00
..
serial serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 2015-04-10 07:50:21 +02:00
storage libpayload: Fix missed CONFIG_ -> CONFIG_LP_ substitutions 2014-10-17 11:24:15 +02:00
timer libpayload: Add drivers for bg4cd 2015-04-08 09:32:21 +02:00
usb libpayload: PCI bus scan - Eliminate endless loop 2015-04-09 21:44:33 +02:00
video libpayload: don't test for unsigned >= 0 2015-01-03 23:58:25 +01:00
Makefile.inc serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 2015-04-10 07:50:21 +02:00
cbmem_console.c libpayload: console: Allow output drivers to print whole strings at once 2014-12-22 21:44:37 +01:00
hid.c
keyboard.c libpayload: Change CONFIG_* to CONFIG_LP_* in the kconfig. 2014-08-05 18:44:08 +02:00
nvram.c libpayload: Change CONFIG_* to CONFIG_LP_* in the kconfig. 2014-08-05 18:44:08 +02:00
options.c
pci.c
serial.c libpayload: Add minimal support for PL011 UART 2014-11-13 06:23:17 +01:00
speaker.c