307 lines
9.7 KiB
C
307 lines
9.7 KiB
C
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/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Octopus board configuration */
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#ifndef __CROS_EC_BASEBOARD_H
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#define __CROS_EC_BASEBOARD_H
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/*******************************************************************************
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* EC Config
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*/
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/*
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* By default, enable all console messages excepted HC, ACPI and event:
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* The sensor stack is generating a lot of activity.
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*/
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#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC)))
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#define CONFIG_SUPPRESSED_HOST_COMMANDS \
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EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_USB_PD_DISCOVERY,\
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EC_CMD_USB_PD_POWER_INFO, EC_CMD_PD_GET_LOG_ENTRY, \
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EC_CMD_MOTION_SENSE_CMD, EC_CMD_GET_NEXT_EVENT
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/*
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* Variant EC defines. Pick one:
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* VARIANT_OCTOPUS_EC_NPCX796FB
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* VARIANT_OCTOPUS_EC_ITE8320
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*/
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#if defined(VARIANT_OCTOPUS_EC_NPCX796FB)
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/* NPCX7 config */
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#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
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#define NPCX_TACH_SEL2 0 /* [0:GPIO40/73, 1:GPIO93/A6] as TACH */
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#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
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/* Internal SPI flash on NPCX7 */
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/* Flash is 1MB but reserve half for future use. */
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#define CONFIG_FLASH_SIZE (512 * 1024)
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#define CONFIG_SPI_FLASH_REGS
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#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
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/* I2C Bus Configuration */
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#define I2C_PORT_BATTERY NPCX_I2C_PORT0_0
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#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0
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#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
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#define I2C_PORT_EEPROM NPCX_I2C_PORT3_0
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#define I2C_PORT_CHARGER NPCX_I2C_PORT4_1
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#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
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#define I2C_ADDR_EEPROM_FLAGS 0x50
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/* Enable PSL hibernate mode. */
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#define CONFIG_HIBERNATE_PSL
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/* EC variant determines USB-C variant */
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#define VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS
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/* Allow the EC to enter deep sleep in S0 */
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#define CONFIG_LOW_POWER_S0
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#elif defined(VARIANT_OCTOPUS_EC_ITE8320)
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/* Flash clock must be > (50Mhz / 2) */
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#define CONFIG_IT83XX_FLASH_CLOCK_48MHZ
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/* I2C Bus Configuration */
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#define I2C_PORT_BATTERY IT83XX_I2C_CH_A /* Shared bus */
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#define I2C_PORT_CHARGER IT83XX_I2C_CH_A /* Shared bus */
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#define I2C_PORT_SENSOR IT83XX_I2C_CH_B
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#define I2C_PORT_USBC0 IT83XX_I2C_CH_C
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#define I2C_PORT_USBC1 IT83XX_I2C_CH_E
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#define I2C_PORT_USB_MUX I2C_PORT_USBC0 /* For MUX driver */
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#define I2C_PORT_EEPROM IT83XX_I2C_CH_F
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#define I2C_ADDR_EEPROM_FLAGS 0x50
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/* EC variant determines USB-C variant */
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#define VARIANT_OCTOPUS_USBC_ITE_EC_TCPCS
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#else
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#error Must define a VARIANT_OCTOPUS_EC
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#endif /* VARIANT_OCTOPUS_EC */
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/* Common EC defines */
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_I2C_BUS_MAY_BE_UNPOWERED
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#define CONFIG_VBOOT_HASH
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#define CONFIG_VSTORE
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#define CONFIG_VSTORE_SLOT_COUNT 1
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#define CONFIG_CRC8
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#define CONFIG_CROS_BOARD_INFO
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#define CONFIG_BOARD_VERSION_CBI
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_DPTF
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#define CONFIG_BOARD_HAS_RTC_RESET
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#define CONFIG_LED_ONOFF_STATES
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/* Port80 -- allow larger buffer for port80 messages */
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#undef CONFIG_PORT80_HISTORY_LEN
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#define CONFIG_PORT80_HISTORY_LEN 256
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/*
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* We don't need CONFIG_BACKLIGHT_LID since hardware AND's LID_OPEN and AP
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* signals with EC backlight enable signal.
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*/
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/*******************************************************************************
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* Battery/Charger/Power Config
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*/
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/*
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* Variant charger defines. Pick one:
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* VARIANT_OCTOPUS_CHARGER_ISL9238
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* VARIANT_OCTOPUS_CHARGER_BQ25703
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*/
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#if defined(VARIANT_OCTOPUS_CHARGER_ISL9238)
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#define CONFIG_CHARGER_ISL9238
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
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/*
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* ISL923x driver sets "Adapter insertion to Switching Debounce"
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* CONTROL2 REG 0x3DH <Bit 11> to 1 which is 150 ms
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*/
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#undef CONFIG_EXTPOWER_DEBOUNCE_MS
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#define CONFIG_EXTPOWER_DEBOUNCE_MS 200
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#elif defined(VARIANT_OCTOPUS_CHARGER_BQ25703)
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#define CONFIG_CHARGER_BQ25703
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
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/*
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* From BQ25703: CHRG_OK is HIGH after 50ms deglitch time.
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*/
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#undef CONFIG_EXTPOWER_DEBOUNCE_MS
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#define CONFIG_EXTPOWER_DEBOUNCE_MS 50
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#else
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#error Must define a VARIANT_OCTOPUS_CHARGER
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#endif /* VARIANT_OCTOPUS_CHARGER */
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/* Common charger defines */
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_CHARGE_RAMP_HW
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_INPUT_CURRENT 512 /* Allow low-current USB charging */
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#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
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#define CONFIG_CHARGER_SENSE_RESISTOR 10
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_USB_CHARGER
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/* Common battery defines */
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION"
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#define CONFIG_BATTERY_FUEL_GAUGE
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#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L
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#define CONFIG_BATTERY_REVIVE_DISCONNECT
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#define CONFIG_BATTERY_SMART
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/*******************************************************************************
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* USB-C Configs
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* Automatically defined by VARIANT_OCTOPUS_EC_ variant.
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*/
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/*
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* Variant USBC defines. Pick one:
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* VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS
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* VARIANT_OCTOPUS_USBC_ITE_EC_TCPCS (requires)
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*/
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#if defined(VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS)
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#define CONFIG_USB_PD_TCPC_LOW_POWER
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#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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#if !defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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#define CONFIG_USB_PD_TCPM_ANX7447 /* C0 TCPC: ANX7447QN */
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#endif
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#define CONFIG_USB_PD_TCPM_PS8751 /* C1 TCPC: PS8751 */
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#define CONFIG_USB_PD_VBUS_DETECT_TCPC
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#define CONFIG_USBC_PPC_NX20P3483
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#elif defined(VARIANT_OCTOPUS_USBC_ITE_EC_TCPCS)
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#undef CONFIG_USB_PD_TCPC_LOW_POWER
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#undef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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#define CONFIG_USB_PD_VBUS_DETECT_PPC
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#define CONFIG_USB_PD_TCPM_ITE83XX /* C0 & C1 TCPC: ITE EC */
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#define CONFIG_USB_MUX_IT5205 /* C0 MUX: IT5205 */
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#define CONFIG_USB_PD_TCPM_PS8751 /* C1 Mux: PS8751 */
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#define CONFIG_USBC_PPC_SN5S330 /* C0 & C1 PPC: each SN5S330 */
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#define CONFIG_USBC_PPC_VCONN
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#define CONFIG_USBC_PPC_DEDICATED_INT
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#else
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#error Must define a VARIANT_OCTOPUS_USBC
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#endif /* VARIANT_OCTOPUS_USBC */
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/* Common USB-C defines */
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_PORT_COUNT 2
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_LOGGING
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USB_PD_COMM_LOCKED
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#define CONFIG_USB_PD_DISCHARGE_PPC
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT
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#define CONFIG_USB_PD_TCPM_MUX
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#define CONFIG_USB_PD_TCPM_TCPCI
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#define CONFIG_BC12_DETECT_MAX14637
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#define CONFIG_CMD_PD_CONTROL
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#define CONFIG_CMD_PPC_DUMP
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/* TODO(b/76218141): Use correct PD delay values */
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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/* TODO(b/76218141): Use correct PD power values */
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#define PD_OPERATING_POWER_MW 15000
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#define PD_MAX_POWER_MW 45000
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 20000
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/*******************************************************************************
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* USB-A Configs
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*/
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/* Common USB-A defines */
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#define USB_PORT_COUNT 2
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#define CONFIG_USB_PORT_POWER_SMART
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#define CONFIG_USB_PORT_POWER_SMART_CDP_SDP_ONLY
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#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP
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#define CONFIG_USB_PORT_POWER_SMART_INVERTED
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#define GPIO_USB1_ILIM_SEL GPIO_USB_A0_CHARGE_EN_L
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#define GPIO_USB2_ILIM_SEL GPIO_USB_A1_CHARGE_EN_L
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/*******************************************************************************
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* SoC / PCH Config
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*/
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/* Common SoC / PCH defines */
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#define CONFIG_CHIPSET_GEMINILAKE
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#define CONFIG_CHIPSET_RESET_HOOK
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#define CONFIG_HOSTCMD_ESPI
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/* TODO(b/74123961): Enable Virtual Wires after bringup */
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#define CONFIG_POWER_COMMON
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#define CONFIG_POWER_S0IX
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#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_X86
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#define CONFIG_POWER_PP5000_CONTROL
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#define CONFIG_EXTPOWER_GPIO
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/*******************************************************************************
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* Keyboard Config
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*/
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/* Common Keyboard Defines */
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#define CONFIG_CMD_KEYBOARD
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#define CONFIG_KEYBOARD_BOARD_CONFIG
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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#define CONFIG_KEYBOARD_COL2_INVERTED
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#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2
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/*******************************************************************************
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* Sensor Config
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*/
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/* Common Sensor Defines */
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#define CONFIG_TABLET_MODE
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#define CONFIG_GMR_TABLET_MODE
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#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L
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/*
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* Slew rate on the PP1800_SENSOR load switch requires a short delay on startup.
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*/
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#undef CONFIG_MOTION_SENSE_RESUME_DELAY_US
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#define CONFIG_MOTION_SENSE_RESUME_DELAY_US (10 * MSEC)
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#ifndef VARIANT_OCTOPUS_NO_SENSORS
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/*
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* Interrupt and fifo are only used for base accelerometer
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* and the lid sensor is polled real-time (in forced mode).
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*/
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#define CONFIG_ACCEL_INTERRUPTS
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/* Enable sensor fifo, must also define the _SIZE and _THRES */
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#define CONFIG_ACCEL_FIFO
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/* Power of 2 - Too large of a fifo causes too much timestamp jitter */
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#define CONFIG_ACCEL_FIFO_SIZE 256
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/* Depends on how fast the AP boots and typical ODRs */
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#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
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#endif /* VARIANT_OCTOPUS_NO_SENSORS */
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/*
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* Sensor stack in EC/Kernel depends on a hardware interrupt pin from EC->AP, so
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* do not define CONFIG_MKBP_USE_HOST_EVENT since all octopus boards use
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* hardware pin to send interrupt from EC -> AP (except casta).
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*/
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#ifndef __ASSEMBLER__
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#include "gpio_signal.h"
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/* Forward declare common (within octopus) board-specific functions */
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void board_reset_pd_mcu(void);
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#ifdef VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS
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void tcpc_alert_event(enum gpio_signal signal);
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#endif
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BASEBOARD_H */
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