89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* STM32F072-discovery board configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* Enable USART1,3,4 and USB streams */
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#define CONFIG_STREAM_USART
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#define CONFIG_STREAM_USART1
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#define CONFIG_STREAM_USART4
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#define CONFIG_STREAM_USB
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#define CONFIG_CMD_USART_INFO
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/* the UART console is on USART2 (PA14/PA15) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 2
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/* Optional features */
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_HW_CRC
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/* USB Configuration */
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#define CONFIG_USB
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#define CONFIG_USB_PID 0x500f
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#define CONFIG_USB_CONSOLE
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_STREAM 0
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#define USB_IFACE_GPIO 1
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#define USB_IFACE_SPI 2
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#define USB_IFACE_CONSOLE 3
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#define USB_IFACE_COUNT 4
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_STREAM 1
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#define USB_EP_GPIO 2
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#define USB_EP_SPI 3
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#define USB_EP_CONSOLE 4
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#define USB_EP_COUNT 5
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/* Enable control of GPIOs over USB */
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#define CONFIG_USB_GPIO
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/* Enable control of SPI over USB */
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#define CONFIG_SPI_MASTER
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#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */
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#define CONFIG_USB_SPI
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#undef CONFIG_WATCHDOG_HELP
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#undef CONFIG_LID_SWITCH
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/*
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* Allow dangerous commands all the time, since we don't have a write protect
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* switch.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#include "gpio_signal.h"
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_VERSION,
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USB_STR_STREAM_NAME,
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USB_STR_CONSOLE_NAME,
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USB_STR_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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