coreboot-libre-fam15h-rdimm/3rdparty/chromeec/board/glados/lfw/gpio.inc

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2024-03-04 11:14:53 +01:00
/* -*- mode:c -*-
*
* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Minimal set of GPIOs needed for LFW loader
*/
/* Declare symbolic names for all the GPIOs that we care about.
* Note: Those with interrupt handlers must be declared first. */
/* SPI PVT chip select */
GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH)
/* Alternate functions GPIO definition */
/* UART */
ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0)
/* SPI pins */
ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0)
ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0)
ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0)