159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
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/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Intel GLK-RVP board-specific configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/*
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* Allow dangerous commands.
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* TODO: Remove this config before production.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC)))
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#undef CONFIG_HOSTCMD_DEBUG_MODE
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/*
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* By default, enable all console messages excepted HC, ACPI and event:
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* The sensor stack is generating a lot of activity.
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*/
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#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
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/* EC console commands */
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/* Battery */
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_PRESENT_CUSTOM
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#define CONFIG_BATTERY_SMART
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/* Charger */
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_ISL9238
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_CHARGER_PROFILE_OVERRIDE_COMMON
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#undef CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES
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#define CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES 3
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#define CONFIG_CHARGER_SENSE_RESISTOR 10
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
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#undef CONFIG_EXTPOWER_DEBOUNCE_MS
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#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000
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#define CONFIG_EXTPOWER_GPIO
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/* DC Jack charge ports */
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#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT
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#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1
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#define DEDICATED_CHARGE_PORT 2
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/* Keyboard */
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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/* UART */
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#define NPCX_UART_MODULE2 1 /* 0:GPIO10/11 1:GPIO64/65 as UART */
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#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
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/* USB-A config */
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/* USB PD config */
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
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#define CONFIG_USB_PD_PORT_COUNT 2
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#define CONFIG_USB_PD_TCPM_TCPCI
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USB_PD_VBUS_DETECT_TCPC
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#define CONFIG_USB_POWER_DELIVERY
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/* USB MUX */
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USB_MUX_PS8743
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/* SoC / PCH */
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#define CONFIG_HOSTCMD_ESPI
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#define CONFIG_CHIPSET_GEMINILAKE
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#define CONFIG_CHIPSET_RESET_HOOK
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_X86
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#define CONFIG_POWER_COMMON
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#define CONFIG_POWER_S0IX
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#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
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/* EC */
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#define CONFIG_BOARD_VERSION_CUSTOM
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#define CONFIG_VOLUME_BUTTONS
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#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL
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#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL
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#define CONFIG_WP_ALWAYS
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#define CONFIG_FLASH_READOUT_PROTECTION
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_LID_SWITCH
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#define CONFIG_LTO
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_FLASH_SIZE 524288
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#define CONFIG_SPI_FLASH_REGS
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#define CONFIG_SPI_FLASH_W25Q40
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/* Verified boot */
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#define CONFIG_SHA256_UNROLLED
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#define CONFIG_VBOOT_HASH
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/*
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* Enable 1 slot of secure temporary storage to support
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* suspend/resume with read/write memory training.
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*/
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#define CONFIG_VSTORE
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#define CONFIG_VSTORE_SLOT_COUNT 1
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/* Optional feature - used by nuvoton */
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#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG*/
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#define NPCX_TACH_SEL2 0 /* 0:GPIO40/A4 1:GPIO93/D3 as TACH */
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/* I2C ports */
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#define I2C_PORT_CHARGER NPCX_I2C_PORT3_0
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#define I2C_PORT_BATTERY NPCX_I2C_PORT3_0
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#define I2C_PORT_USB_MUX NPCX_I2C_PORT7_0
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/* EC exclude modules */
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#undef CONFIG_ADC
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#ifndef __ASSEMBLER__
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#include "gpio_signal.h"
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#include "registers.h"
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enum adc_channel {
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ADC_VBUS,
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ADC_CH_COUNT,
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};
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int board_get_version(void);
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/* TODO: Verify the numbers below. */
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
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/* Define typical operating power and max power */
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#define PD_OPERATING_POWER_MW 15000
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#define PD_MAX_POWER_MW 45000
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 20000
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#define DC_JACK_MAX_VOLTAGE_MV 19000
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/* Reset PD MCU */
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void board_reset_pd_mcu(void);
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void tcpc_alert_event(enum gpio_signal signal);
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void board_charging_enable(int port, int enable);
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void board_vbus_enable(int port, int enable);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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