52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* INTC control module for IT83xx. */
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#ifndef __CROS_EC_INTC_H
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#define __CROS_EC_INTC_H
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/*
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* The DSB instruction guarantees a modified architecture or hardware state
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* can be seen by any following dependent data operations.
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*/
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static inline void data_serialization_barrier(void)
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{
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if (IS_ENABLED(CHIP_CORE_NDS32))
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asm volatile ("dsb");
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}
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int intc_get_ec_int(void);
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void pm1_ibf_interrupt(void);
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void pm2_ibf_interrupt(void);
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void pm3_ibf_interrupt(void);
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void pm4_ibf_interrupt(void);
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void pm5_ibf_interrupt(void);
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void lpcrst_interrupt(enum gpio_signal signal);
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void peci_interrupt(void);
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void adc_interrupt(void);
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void i2c_interrupt(int port);
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#ifdef CONFIG_I2C_SLAVE
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void i2c_slv_interrupt(int port);
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#endif
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void clock_sleep_mode_wakeup_isr(void);
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int clock_ec_wake_from_sleep(void);
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void __enter_hibernate(uint32_t seconds, uint32_t microseconds);
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void espi_reset_pin_asserted_interrupt(enum gpio_signal signal);
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void espi_fw_reset_module(void);
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void espi_interrupt(void);
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void espi_vw_interrupt(void);
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void espi_enable_pad(int enable);
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void espi_init(void);
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int chip_get_intc_group(int irq);
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void clock_cpu_standby(void);
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#if defined(CONFIG_HOSTCMD_X86) && defined(HAS_TASK_KEYPROTO)
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void lpc_kbc_ibf_interrupt(void);
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void lpc_kbc_obe_interrupt(void);
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#endif
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#endif /* __CROS_EC_INTC_H */
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