290 lines
6.7 KiB
C
290 lines
6.7 KiB
C
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/* Copyright 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* GPIO module for MEC1322 */
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#include "common.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "registers.h"
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#include "system.h"
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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struct gpio_int_mapping {
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int8_t girq_id;
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int8_t port_offset;
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};
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/* Mapping from GPIO port to GIRQ info */
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static const struct gpio_int_mapping int_map[22] = {
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{11, 0}, {11, 0}, {11, 0}, {11, 0},
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{10, 4}, {10, 4}, {10, 4}, {-1, -1},
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{-1, -1}, {-1, -1}, {9, 10}, {9, 10},
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{9, 10}, {9, 10}, {8, 14}, {8, 14},
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{8, 14}, {-1, -1}, {-1, -1}, {-1, -1},
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{20, 20}, {20, 20}
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};
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void gpio_set_alternate_function(uint32_t port, uint32_t mask, int func)
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{
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int i;
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uint32_t val;
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while (mask) {
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i = __builtin_ffs(mask) - 1;
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val = MEC1322_GPIO_CTL(port, i);
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val &= ~(BIT(12) | BIT(13));
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/* mux_control = 0 indicates GPIO */
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if (func > 0)
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val |= (func & 0x3) << 12;
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MEC1322_GPIO_CTL(port, i) = val;
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mask &= ~BIT(i);
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}
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}
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test_mockable int gpio_get_level(enum gpio_signal signal)
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{
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uint32_t mask = gpio_list[signal].mask;
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int i;
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uint32_t val;
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if (mask == 0)
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return 0;
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i = GPIO_MASK_TO_NUM(mask);
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val = MEC1322_GPIO_CTL(gpio_list[signal].port, i);
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return (val & BIT(24)) ? 1 : 0;
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}
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void gpio_set_level(enum gpio_signal signal, int value)
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{
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uint32_t mask = gpio_list[signal].mask;
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int i;
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if (mask == 0)
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return;
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i = GPIO_MASK_TO_NUM(mask);
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if (value)
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MEC1322_GPIO_CTL(gpio_list[signal].port, i) |= BIT(16);
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else
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MEC1322_GPIO_CTL(gpio_list[signal].port, i) &= ~BIT(16);
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}
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void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
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{
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int i;
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uint32_t val;
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while (mask) {
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i = GPIO_MASK_TO_NUM(mask);
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mask &= ~BIT(i);
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val = MEC1322_GPIO_CTL(port, i);
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/*
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* Select open drain first, so that we don't glitch the signal
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* when changing the line to an output.
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*/
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if (flags & GPIO_OPEN_DRAIN)
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val |= BIT(8);
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else
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val &= ~BIT(8);
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if (flags & GPIO_OUTPUT) {
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val |= BIT(9);
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val &= ~BIT(10);
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} else {
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val &= ~BIT(9);
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val |= BIT(10);
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}
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/* Handle pullup / pulldown */
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if (flags & GPIO_PULL_UP)
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val = (val & ~0x3) | 0x1;
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else if (flags & GPIO_PULL_DOWN)
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val = (val & ~0x3) | 0x2;
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else
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val &= ~0x3;
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/* Set up interrupt */
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if (flags & (GPIO_INT_F_RISING | GPIO_INT_F_FALLING))
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val |= BIT(7);
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else
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val &= ~BIT(7);
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val &= ~(0x7 << 4);
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if ((flags & GPIO_INT_F_RISING) && (flags & GPIO_INT_F_FALLING))
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val |= 0x7 << 4;
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else if (flags & GPIO_INT_F_RISING)
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val |= 0x5 << 4;
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else if (flags & GPIO_INT_F_FALLING)
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val |= 0x6 << 4;
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else if (flags & GPIO_INT_F_HIGH)
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val |= 0x1 << 4;
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else if (!(flags & GPIO_INT_F_LOW)) /* No interrupt flag set */
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val |= 0x4 << 4;
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/* Set up level */
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if (flags & GPIO_HIGH)
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val |= BIT(16);
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else if (flags & GPIO_LOW)
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val &= ~BIT(16);
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MEC1322_GPIO_CTL(port, i) = val;
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}
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}
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int gpio_enable_interrupt(enum gpio_signal signal)
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{
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int i, port, girq_id, bit_id;
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if (gpio_list[signal].mask == 0)
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return EC_SUCCESS;
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i = GPIO_MASK_TO_NUM(gpio_list[signal].mask);
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port = gpio_list[signal].port;
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girq_id = int_map[port].girq_id;
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bit_id = (port - int_map[port].port_offset) * 8 + i;
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MEC1322_INT_ENABLE(girq_id) |= BIT(bit_id);
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MEC1322_INT_BLK_EN |= BIT(girq_id);
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return EC_SUCCESS;
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}
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int gpio_disable_interrupt(enum gpio_signal signal)
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{
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int i, port, girq_id, bit_id;
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if (gpio_list[signal].mask == 0)
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return EC_SUCCESS;
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i = GPIO_MASK_TO_NUM(gpio_list[signal].mask);
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port = gpio_list[signal].port;
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girq_id = int_map[port].girq_id;
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bit_id = (port - int_map[port].port_offset) * 8 + i;
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MEC1322_INT_DISABLE(girq_id) = BIT(bit_id);
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return EC_SUCCESS;
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}
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int gpio_clear_pending_interrupt(enum gpio_signal signal)
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{
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int i, port, girq_id, bit_id;
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if (gpio_list[signal].mask == 0)
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return EC_SUCCESS;
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i = GPIO_MASK_TO_NUM(gpio_list[signal].mask);
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port = gpio_list[signal].port;
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girq_id = int_map[port].girq_id;
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bit_id = (port - int_map[port].port_offset) * 8 + i;
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/* Clear interrupt source sticky status bit even if not enabled */
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MEC1322_INT_SOURCE(girq_id) |= 1 << bit_id;
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return EC_SUCCESS;
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}
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void gpio_pre_init(void)
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{
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int i;
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int flags;
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int is_warm = system_is_reboot_warm();
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const struct gpio_info *g = gpio_list;
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for (i = 0; i < GPIO_COUNT; i++, g++) {
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flags = g->flags;
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if (flags & GPIO_DEFAULT)
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continue;
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/*
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* If this is a warm reboot, don't set the output levels or
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* we'll shut off the AP.
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*/
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if (is_warm)
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flags &= ~(GPIO_LOW | GPIO_HIGH);
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gpio_set_flags_by_mask(g->port, g->mask, flags);
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/* Use as GPIO, not alternate function */
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gpio_set_alternate_function(g->port, g->mask, -1);
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}
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}
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/* Clear any interrupt flags before enabling GPIO interrupt */
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#define ENABLE_GPIO_GIRQ(x) \
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do { \
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MEC1322_INT_SOURCE(x) |= MEC1322_INT_RESULT(x); \
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task_enable_irq(MEC1322_IRQ_GIRQ ## x); \
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} while (0)
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static void gpio_init(void)
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{
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ENABLE_GPIO_GIRQ(8);
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ENABLE_GPIO_GIRQ(9);
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ENABLE_GPIO_GIRQ(10);
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ENABLE_GPIO_GIRQ(11);
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ENABLE_GPIO_GIRQ(20);
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}
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DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT);
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/*****************************************************************************/
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/* Interrupt handlers */
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/**
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* Handler for each GIRQ interrupt. This reads and clears the interrupt bits for
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* the GIRQ interrupt, then finds and calls the corresponding GPIO interrupt
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* handlers.
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*
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* @param girq GIRQ index
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* @param port_offset GPIO port offset for the given GIRQ
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*/
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static void gpio_interrupt(int girq, int port_offset)
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{
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int i, bit;
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const struct gpio_info *g = gpio_list;
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uint32_t sts = MEC1322_INT_RESULT(girq);
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MEC1322_INT_SOURCE(girq) |= sts;
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for (i = 0; i < GPIO_IH_COUNT && sts; ++i, ++g) {
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bit = (g->port - port_offset) * 8 + __builtin_ffs(g->mask) - 1;
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if (sts & BIT(bit))
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gpio_irq_handlers[i](i);
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sts &= ~BIT(bit);
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}
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}
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#define GPIO_IRQ_FUNC(irqfunc, girq, port_offset) \
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void irqfunc(void) \
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{ \
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gpio_interrupt(girq, port_offset); \
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}
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GPIO_IRQ_FUNC(__girq_8_interrupt, 8, 14);
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GPIO_IRQ_FUNC(__girq_9_interrupt, 9, 10);
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GPIO_IRQ_FUNC(__girq_10_interrupt, 10, 4);
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GPIO_IRQ_FUNC(__girq_11_interrupt, 11, 0);
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GPIO_IRQ_FUNC(__girq_20_interrupt, 20, 20);
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#undef GPIO_IRQ_FUNC
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/*
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* Declare IRQs. Nesting this macro inside the GPIO_IRQ_FUNC macro works
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* poorly because DECLARE_IRQ() stringizes its inputs.
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*/
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DECLARE_IRQ(MEC1322_IRQ_GIRQ8, __girq_8_interrupt, 1);
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DECLARE_IRQ(MEC1322_IRQ_GIRQ9, __girq_9_interrupt, 1);
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DECLARE_IRQ(MEC1322_IRQ_GIRQ10, __girq_10_interrupt, 1);
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DECLARE_IRQ(MEC1322_IRQ_GIRQ11, __girq_11_interrupt, 1);
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DECLARE_IRQ(MEC1322_IRQ_GIRQ20, __girq_20_interrupt, 1);
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