65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_CONFIG_CHIP_H
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#define __CROS_EC_CONFIG_CHIP_H
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#include "core/cortex-m0/config_core.h"
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/* System stack size */
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#define CONFIG_STACK_SIZE 1024
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/* Idle task stack size */
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#define IDLE_TASK_STACK_SIZE 256
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/* Default task stack size */
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#define TASK_STACK_SIZE 488
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/* Larger task stack size, for hook task */
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#define LARGER_TASK_STACK_SIZE 640
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/* Interval between HOOK_TICK notifications */
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#define HOOK_TICK_INTERVAL_MS 500
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#define HOOK_TICK_INTERVAL (HOOK_TICK_INTERVAL_MS * MSEC)
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/* Number of I2C ports */
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#define I2C_PORT_COUNT 2
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/*
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* --- chip variant settings ---
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*/
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/* RAM mapping */
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#define CONFIG_RAM_BASE 0x20000000
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#define CONFIG_RAM_SIZE 0x00004000
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/* Flash mapping */
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#define CONFIG_PROGRAM_MEMORY_BASE 0x00000000
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#define CONFIG_FLASH_SIZE 0x00040000
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#define CONFIG_FLASH_BANK_SIZE 0x1000
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/* Memory-mapped internal flash */
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#define CONFIG_INTERNAL_STORAGE
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#define CONFIG_MAPPED_STORAGE
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/* Program is run directly from storage */
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#define CONFIG_MAPPED_STORAGE_BASE CONFIG_PROGRAM_MEMORY_BASE
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/* Compute the rest of the flash params from these */
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#include "config_std_internal_flash.h"
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/* Number of IRQ vectors on the NVIC */
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#define CONFIG_IRQ_COUNT 32
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/* Not that much RAM, set to smaller */
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 1024
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#define GPIO_PIN(port, index) GPIO_##port, BIT(index)
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#define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m)
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#endif /* __CROS_EC_CONFIG_CHIP_H */
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