70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
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/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Registers map and definitions for mIA LM2 processor
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*/
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#ifndef __CROS_EC_IA32_INTERRUPTS_H
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#define __CROS_EC_IA32_INTERRUPTS_H
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#define USHRT_MAX 0xFFFF
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typedef struct {
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unsigned irq;
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unsigned trigger;
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unsigned polarity;
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unsigned vector;
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} irq_desc_t;
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#define INTR_DESC(__irq,__vector,__trig) \
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{ \
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.irq = __irq, \
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.trigger = __trig, \
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.polarity = IOAPIC_REDTBL_INTPOL_HIGH, \
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.vector = __vector \
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}
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#define LEVEL_INTR(__irq, __vector) \
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INTR_DESC(__irq, __vector, IOAPIC_REDTBL_TRIGGER_LEVEL)
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#define EDGE_INTR(__irq, __vector) \
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INTR_DESC(__irq, __vector, IOAPIC_REDTBL_TRIGGER_EDGE)
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#endif
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/* ISH has a single core processor */
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#define DEST_APIC_ID 0
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#define NUM_VECTORS 256
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/* APIC bit definitions. */
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#define APIC_DIV_16 0x03
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#define APIC_ENABLE_BIT (1UL << 8UL)
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#define APIC_SPURIOUS_INT REG32(ISH_LAPIC_BASE + 0xF0UL )
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#define APIC_LVT_ERROR REG32(ISH_LAPIC_BASE + 0x370UL)
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#ifndef __ASSEMBLER__
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typedef void (*isr_handler_t) (void);
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void init_interrupts(void);
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void mask_interrupt(unsigned int irq);
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void unmask_interrupt(unsigned int irq);
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/**
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* disable current all enabled intrrupts
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* return current irq mask bitmap
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* power management typically use 'disable_all_interrupts' to disable current
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* all interrupts and save current interrupts enabling settings before enter
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* low power state, and use 'restore_interrupts' to restore the interrupts
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* settings after exit low power state.
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*/
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uint64_t disable_all_interrupts(void);
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void restore_interrupts(uint64_t irq_map);
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/* Only call in interrupt context */
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uint32_t get_current_interrupt_vector(void);
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#endif
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#endif /* __CROS_EC_IA32_INTERRUPTS_H */
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