130 lines
3.2 KiB
ArmAsm
130 lines
3.2 KiB
ArmAsm
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <common/bl_common.h>
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/* -----------------------------------------------------------------------------
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* Very simple stackless exception handlers used by BL2 and BL31 stages.
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* BL31 uses them before stacks are setup. BL2 uses them throughout.
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* -----------------------------------------------------------------------------
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*/
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.globl early_exceptions
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vector_base early_exceptions
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/* -----------------------------------------------------
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* Current EL with SP0 : 0x0 - 0x200
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionSP0
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mov x0, #SYNC_EXCEPTION_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionSP0
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vector_entry IrqSP0
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mov x0, #IRQ_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqSP0
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vector_entry FiqSP0
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mov x0, #FIQ_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqSP0
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vector_entry SErrorSP0
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mov x0, #SERROR_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorSP0
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/* -----------------------------------------------------
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* Current EL with SPx: 0x200 - 0x400
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionSPx
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mov x0, #SYNC_EXCEPTION_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionSPx
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vector_entry IrqSPx
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mov x0, #IRQ_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqSPx
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vector_entry FiqSPx
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mov x0, #FIQ_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqSPx
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vector_entry SErrorSPx
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mov x0, #SERROR_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorSPx
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/* -----------------------------------------------------
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* Lower EL using AArch64 : 0x400 - 0x600
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionA64
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mov x0, #SYNC_EXCEPTION_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionA64
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vector_entry IrqA64
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mov x0, #IRQ_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqA64
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vector_entry FiqA64
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mov x0, #FIQ_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqA64
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vector_entry SErrorA64
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mov x0, #SERROR_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorA64
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/* -----------------------------------------------------
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* Lower EL using AArch32 : 0x600 - 0x800
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionA32
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mov x0, #SYNC_EXCEPTION_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionA32
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vector_entry IrqA32
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mov x0, #IRQ_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqA32
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vector_entry FiqA32
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mov x0, #FIQ_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqA32
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vector_entry SErrorA32
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mov x0, #SERROR_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorA32
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