270 lines
7.7 KiB
C
270 lines
7.7 KiB
C
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/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Grunt family-specific configuration */
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#ifndef __CROS_EC_BASEBOARD_H
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#define __CROS_EC_BASEBOARD_H
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#if (defined(VARIANT_GRUNT_TCPC_0_ANX3429) \
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+ defined(VARIANT_GRUNT_TCPC_0_ANX3447)) != 1
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#error Must choose VARIANT_GRUNT_TCPC_0_ANX3429 or VARIANT_GRUNT_TCPC_0_ANX3447
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#endif
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/* NPCX7 config */
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#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
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#define NPCX_TACH_SEL2 0 /* No tach. */
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#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
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/* Internal SPI flash on NPCX7 */
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/* Flash is 1MB but reserve half for future use. */
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#define CONFIG_FLASH_SIZE (512 * 1024)
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#define CONFIG_SPI_FLASH_REGS
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#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
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/*
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* Enable 1 slot of secure temporary storage to support
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* suspend/resume with read/write memory training.
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*/
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#define CONFIG_VSTORE
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#define CONFIG_VSTORE_SLOT_COUNT 1
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#define CONFIG_ADC
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#define CONFIG_BACKLIGHT_LID
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#define CONFIG_BACKLIGHT_LID_ACTIVE_LOW
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#define CONFIG_BOARD_VERSION_CUSTOM
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#define CONFIG_CMD_AP_RESET_LOG
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#define CONFIG_EC_FEATURE_BOARD_OVERRIDE
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#define CONFIG_HIBERNATE_PSL
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#define CONFIG_HOSTCMD_LPC
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#define CONFIG_HOSTCMD_SKUID
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#define CONFIG_I2C
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#define CONFIG_I2C_BUS_MAY_BE_UNPOWERED
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#define CONFIG_I2C_MASTER
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_LOW_POWER_S0
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#define CONFIG_LTO
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#define CONFIG_PWM
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#define CONFIG_PWM_KBLIGHT
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#define CONFIG_TEMP_SENSOR
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#define CONFIG_THERMISTOR_NCP15WB
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#define CONFIG_VBOOT_HASH
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#define CONFIG_VOLUME_BUTTONS
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_FUEL_GAUGE
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#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L
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#define CONFIG_BATTERY_REVIVE_DISCONNECT
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#define CONFIG_BATTERY_SMART
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#define CONFIG_BC12_DETECT_MAX14637
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#define CONFIG_CHARGER
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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/*
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* This limit impairs compatibility with BC1.2 chargers that are not actually
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* capable of supplying 500 mA of current. When the charger is paralleled with
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* the battery, raising this limit allows the power system to draw more current
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* from the charger during startup. This improves compatibility with system
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* batteries that may become excessively imbalanced after extended periods of
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* rest.
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*
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* See also b/111214767
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*/
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_ISL9238
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#define CONFIG_CHARGER_SENSE_RESISTOR 10
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
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#define CONFIG_CHARGE_RAMP_HW
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#define CONFIG_USB_CHARGER
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#define CONFIG_CHIPSET_STONEY
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#define CONFIG_CHIPSET_RESET_HOOK
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/*
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* ACOK from ISL9238 sometimes has a negative pulse after connecting
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* USB-C power. We want to ignore it. b/77455171
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*/
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#undef CONFIG_EXTPOWER_DEBOUNCE_MS
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#define CONFIG_EXTPOWER_DEBOUNCE_MS 200
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#define CONFIG_EXTPOWER_GPIO
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#define CONFIG_POWER_COMMON
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#define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_X86
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/*
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* On power-on, H1 releases the EC from reset but then quickly asserts and
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* releases the reset a second time. This means the EC sees 2 resets:
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* (1) power-on reset, (2) reset-pin reset. If we add a delay between reset (1)
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* and configuring GPIO output levels, then reset (2) will happen before the
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* end of the delay so we avoid extra output toggles.
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*/
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#define CONFIG_GPIO_INIT_POWER_ON_DELAY_MS 100
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#define CONFIG_KEYBOARD_BOARD_CONFIG
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#define CONFIG_KEYBOARD_COL2_INVERTED
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_CMD_PD_CONTROL
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USB_PD_COMM_LOCKED
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#define CONFIG_USB_PD_DISCHARGE_PPC
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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#define CONFIG_USB_PD_LOGGING
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#define CONFIG_USB_PD_PORT_COUNT 2
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#define CONFIG_USB_PD_TCPC_LOW_POWER
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#ifdef VARIANT_GRUNT_TCPC_0_ANX3429
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#define CONFIG_USB_PD_TCPM_ANX3429
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#elif defined(VARIANT_GRUNT_TCPC_0_ANX3447)
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#define CONFIG_USB_PD_TCPM_ANX7447
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#endif
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#define CONFIG_USB_PD_TCPM_MUX
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#define CONFIG_USB_PD_TCPM_PS8751
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#define CONFIG_USB_PD_TCPM_TCPCI
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USB_PD_VBUS_DETECT_PPC
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#define CONFIG_USBC_PPC_SN5S330
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#define CONFIG_USBC_PPC_DEDICATED_INT
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USBC_SS_MUX_DFP_ONLY
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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/* USB-A config */
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#define CONFIG_USB_PORT_POWER_DUMB
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#define USB_PORT_COUNT 2
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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#define PD_OPERATING_POWER_MW 15000
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#define PD_MAX_POWER_MW 45000
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 20000
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/*
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* Minimum conditions to start AP and perform swsync. Note that when the
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* charger is connected via USB-PD analog signaling, the boot will proceed
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* regardless.
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*/
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#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 3
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/*
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* Require PD negotiation to be complete when we are in a low-battery condition
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* prior to releasing depthcharge to the kernel.
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*/
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 15001
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 3
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/* Increase length of history buffer for port80 messages. */
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#undef CONFIG_PORT80_HISTORY_LEN
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#define CONFIG_PORT80_HISTORY_LEN 256
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#define I2C_PORT_BATTERY I2C_PORT_POWER
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#define I2C_PORT_CHARGER I2C_PORT_POWER
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#define I2C_PORT_POWER NPCX_I2C_PORT0_0
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#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0
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#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
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#define I2C_PORT_THERMAL NPCX_I2C_PORT3_0
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#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
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/* Accelerometer and Gyroscope are the same device. */
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#define I2C_PORT_ACCEL I2C_PORT_SENSOR
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/* Sensors */
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#define CONFIG_MKBP_EVENT
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#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT
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/* Thermal */
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#define CONFIG_TEMP_SENSOR_SB_TSI
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#ifndef VARIANT_GRUNT_NO_SENSORS
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/* Enable sensor fifo, must also define the _SIZE and _THRES */
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#define CONFIG_ACCEL_FIFO
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/* FIFO size is a power of 2. */
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#define CONFIG_ACCEL_FIFO_SIZE 256
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/* Depends on how fast the AP boots and typical ODRs. */
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#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
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#endif /* VARIANT_GRUNT_NO_SENSORS */
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#define USB_PD_PORT_ANX74XX 0
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#define USB_PD_PORT_PS8751 1
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#ifndef __ASSEMBLER__
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#include "gpio_signal.h"
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#include "math_util.h"
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#include "registers.h"
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enum adc_channel {
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ADC_TEMP_SENSOR_CHARGER,
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ADC_TEMP_SENSOR_SOC,
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ADC_VBUS,
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ADC_SKU_ID1,
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ADC_SKU_ID2,
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ADC_CH_COUNT
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};
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enum power_signal {
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X86_SLP_S3_N,
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X86_SLP_S5_N,
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X86_S0_PGOOD,
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X86_S5_PGOOD,
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POWER_SIGNAL_COUNT
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};
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enum temp_sensor_id {
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TEMP_SENSOR_CHARGER = 0,
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TEMP_SENSOR_SOC,
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TEMP_SENSOR_CPU,
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TEMP_SENSOR_COUNT
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};
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enum sensor_id {
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LID_ACCEL,
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BASE_ACCEL,
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BASE_GYRO,
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SENSOR_COUNT,
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};
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/*
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* Matrix to rotate accelerators into the standard reference frame. The default
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* is the identity which is correct for the reference design. Variations of
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* Grunt may need to change it for manufacturability.
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* For the lid:
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* +x to the right
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* +y up
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* +z out of the page
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*
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* The principle axes of the body are aligned with the lid when the lid is in
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* the 180 degree position (open, flat).
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*
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* Boards within the Grunt family may need to modify this definition at
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* board_init() time.
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*/
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extern mat33_fp_t grunt_base_standard_ref;
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/* Sensors without hardware FIFO are in forced mode */
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#define CONFIG_ACCEL_FORCE_MODE_MASK (1 << LID_ACCEL)
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void board_reset_pd_mcu(void);
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/* Common definition for the USB PD interrupt handlers. */
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void tcpc_alert_event(enum gpio_signal signal);
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void ppc_interrupt(enum gpio_signal signal);
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void anx74xx_cable_det_interrupt(enum gpio_signal signal);
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int board_get_version(void);
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int board_is_convertible(void);
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void board_update_sensor_config_from_sku(void);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BASEBOARD_H */
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