250 lines
6.9 KiB
C
250 lines
6.9 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Hoho dongle configuration */
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#include "adc.h"
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#include "adc_chip.h"
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#include "common.h"
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#include "ec_commands.h"
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#include "ec_version.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "mcdp28x0.h"
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#include "registers.h"
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#include "task.h"
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#include "usb_bb.h"
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#include "usb_descriptor.h"
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#include "usb_pd.h"
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#include "timer.h"
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#include "util.h"
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static volatile uint64_t hpd_prev_ts;
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static volatile int hpd_prev_level;
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void hpd_event(enum gpio_signal signal);
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#include "gpio_list.h"
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/**
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* Hotplug detect deferred task
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*
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* Called after level change on hpd GPIO to evaluate (and debounce) what event
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* has occurred. There are 3 events that occur on HPD:
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* 1. low : downstream display sink is deattached
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* 2. high : downstream display sink is attached
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* 3. irq : downstream display sink signalling an interrupt.
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*
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* The debounce times for these various events are:
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* HPD_USTREAM_DEBOUNCE_LVL : min pulse width of level value.
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* HPD_USTREAM_DEBOUNCE_IRQ : min pulse width of IRQ low pulse.
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*
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* lvl(n-2) lvl(n-1) lvl prev_delta now_delta event
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* ----------------------------------------------------
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* 1 0 1 <IRQ n/a low glitch (ignore)
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* 1 0 1 >IRQ <LVL irq
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* x 0 1 n/a >LVL high
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* 0 1 0 <LVL n/a high glitch (ignore)
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* x 1 0 n/a >LVL low
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*/
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void hpd_irq_deferred(void)
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{
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pd_send_hpd(0, hpd_irq);
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}
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DECLARE_DEFERRED(hpd_irq_deferred);
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void hpd_lvl_deferred(void)
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{
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int level = gpio_get_level(GPIO_DP_HPD);
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if (level != hpd_prev_level)
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/* It's a glitch while in deferred or canceled action */
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return;
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pd_send_hpd(0, (level) ? hpd_high : hpd_low);
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}
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DECLARE_DEFERRED(hpd_lvl_deferred);
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void hpd_event(enum gpio_signal signal)
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{
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timestamp_t now = get_time();
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int level = gpio_get_level(signal);
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uint64_t cur_delta = now.val - hpd_prev_ts;
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/* store current time */
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hpd_prev_ts = now.val;
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/* All previous hpd level events need to be re-triggered */
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hook_call_deferred(&hpd_lvl_deferred_data, -1);
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/* It's a glitch. Previous time moves but level is the same. */
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if (cur_delta < HPD_USTREAM_DEBOUNCE_IRQ)
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return;
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if ((!hpd_prev_level && level) &&
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(cur_delta < HPD_USTREAM_DEBOUNCE_LVL))
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/* It's an irq */
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hook_call_deferred(&hpd_irq_deferred_data, 0);
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else if (cur_delta >= HPD_USTREAM_DEBOUNCE_LVL)
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hook_call_deferred(&hpd_lvl_deferred_data,
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HPD_USTREAM_DEBOUNCE_LVL);
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hpd_prev_level = level;
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}
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/* Initialize board. */
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void board_config_pre_init(void)
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{
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/* enable SYSCFG clock */
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STM32_RCC_APB2ENR |= BIT(0);
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/* Remap USART DMA to match the USART driver */
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STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10);/* Remap USART1 RX/TX DMA */
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}
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#ifdef CONFIG_SPI_FLASH
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static void board_init_spi2(void)
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{
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/* Remap SPI2 to DMA channels 6 and 7 */
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STM32_SYSCFG_CFGR1 |= BIT(24);
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/* Set pin NSS to general purpose output mode (01b). */
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/* Set pins SCK, MISO, and MOSI to alternate function (10b). */
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STM32_GPIO_MODER(GPIO_B) &= ~0xff000000;
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STM32_GPIO_MODER(GPIO_B) |= 0xa9000000;
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/* Set all four pins to alternate function 0 */
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STM32_GPIO_AFRH(GPIO_B) &= ~(0xffff0000);
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/* Set all four pins to output push-pull */
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STM32_GPIO_OTYPER(GPIO_B) &= ~(0xf000);
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/* Set pullup on NSS */
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STM32_GPIO_PUPDR(GPIO_B) |= 0x1000000;
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/* Set all four pins to high speed */
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STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000;
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/* Reset SPI2 */
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STM32_RCC_APB1RSTR |= BIT(14);
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STM32_RCC_APB1RSTR &= ~BIT(14);
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/* Enable clocks to SPI2 module */
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STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
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}
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#endif /* CONFIG_SPI_FLASH */
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static void factory_validation_deferred(void)
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{
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struct mcdp_info info;
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mcdp_enable();
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/* test mcdp via serial to validate function */
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if (!mcdp_get_info(&info) && (MCDP_FAMILY(info.family) == 0x0010) &&
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(MCDP_CHIPID(info.chipid) == 0x2850)) {
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gpio_set_level(GPIO_MCDP_READY, 1);
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pd_log_event(PD_EVENT_VIDEO_CODEC,
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PD_LOG_PORT_SIZE(0, sizeof(info)),
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0, &info);
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}
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mcdp_disable();
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}
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DECLARE_DEFERRED(factory_validation_deferred);
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/* Initialize board. */
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static void board_init(void)
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{
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timestamp_t now;
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#ifdef CONFIG_SPI_FLASH
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board_init_spi2();
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#endif
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now = get_time();
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hpd_prev_level = gpio_get_level(GPIO_DP_HPD);
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hpd_prev_ts = now.val;
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gpio_enable_interrupt(GPIO_DP_HPD);
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gpio_set_level(GPIO_STM_READY, 1); /* factory test only */
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/* Delay needed to allow HDMI MCU to boot. */
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hook_call_deferred(&factory_validation_deferred_data, 200*MSEC);
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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/* ADC channels */
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const struct adc_t adc_channels[] = {
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/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
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[ADC_CH_CC1_PD] = {"USB_C_CC1_PD", 3300, 4096, 0, STM32_AIN(1)},
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};
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BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
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const void * const usb_strings[] = {
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[USB_STR_DESC] = usb_string_desc,
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[USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
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[USB_STR_PRODUCT] = USB_STRING_DESC("Hoho"),
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[USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
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[USB_STR_BB_URL] = USB_STRING_DESC(USB_GOOGLE_TYPEC_URL),
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};
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BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
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/**
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* USB configuration
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* Any type-C device with alternate mode capabilities must have the following
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* set of descriptors.
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*
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* 1. Standard Device
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* 2. BOS
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* 2a. Container ID
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* 2b. Billboard Caps
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*/
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struct my_bos {
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struct usb_bos_hdr_descriptor bos;
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struct usb_contid_caps_descriptor contid_caps;
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struct usb_bb_caps_base_descriptor bb_caps;
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struct usb_bb_caps_svid_descriptor bb_caps_svids[1];
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};
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static struct my_bos bos_desc = {
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.bos = {
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.bLength = USB_DT_BOS_SIZE,
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.bDescriptorType = USB_DT_BOS,
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.wTotalLength = (USB_DT_BOS_SIZE + USB_DT_CONTID_SIZE +
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USB_BB_CAPS_BASE_SIZE +
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USB_BB_CAPS_SVID_SIZE * 1),
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.bNumDeviceCaps = 2, /* contid + bb_caps */
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},
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.contid_caps = {
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.bLength = USB_DT_CONTID_SIZE,
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.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
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.bDevCapabilityType = USB_DC_DTYPE_CONTID,
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.bReserved = 0,
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.ContainerID = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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},
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.bb_caps = {
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.bLength = (USB_BB_CAPS_BASE_SIZE + USB_BB_CAPS_SVID_SIZE * 1),
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.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
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.bDevCapabilityType = USB_DC_DTYPE_BILLBOARD,
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.iAdditionalInfoURL = USB_STR_BB_URL,
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.bNumberOfAlternateModes = 1,
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.bPreferredAlternateMode = 1,
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.VconnPower = 0,
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.bmConfigured = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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.bReserved = 0,
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},
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.bb_caps_svids = {
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{
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.wSVID = 0xff01, /* TODO(tbroch) def'd in other CL remove hardcode */
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.bAlternateMode = 1,
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.iAlternateModeString = USB_STR_BB_URL, /* TODO(crosbug.com/p/32687) */
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},
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},
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};
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const struct bos_context bos_ctx = {
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.descp = (void *)&bos_desc,
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.size = sizeof(struct my_bos),
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};
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