115 lines
2.7 KiB
C
115 lines
2.7 KiB
C
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/* Copyright 2019 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Intel TGL-U-RVP-ITE board-specific configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* USB MUX */
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#define CONFIG_USB_MUX_VIRTUAL
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#define CONFIG_USBC_VCONN
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/* FAN configs */
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#define CONFIG_FANS 1
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#define BOARD_FAN_MIN_RPM 3000
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#define BOARD_FAN_MAX_RPM 10000
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/* Temperature sensor */
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#define CONFIG_TEMP_SENSOR
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#include "baseboard.h"
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#define CONFIG_CHIPSET_TIGERLAKE
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#define GPIO_EC_PCH_RSMRST_L GPIO_PCH_RSMRST_L
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#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD
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/* Charger */
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#define CONFIG_CHARGER_ISL9241
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/* DC Jack charge ports */
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#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT
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#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1
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/* USB ports */
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#define CONFIG_USB_PD_PORT_COUNT 2
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#define DEDICATED_CHARGE_PORT 2
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/* USB-C port's USB2 & USB3 port numbers */
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#ifdef BOARD_TGLRVPU_ITE
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#define TYPE_C_PORT_0_USB2_NUM 6
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#define TYPE_C_PORT_1_USB2_NUM 7
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#define TYPE_C_PORT_0_USB3_NUM 3
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#define TYPE_C_PORT_1_USB3_NUM 4
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#else /* BOARD_TGLRVPY_ITE */
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#define TYPE_C_PORT_0_USB2_NUM 6
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#define TYPE_C_PORT_1_USB2_NUM 5
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#define TYPE_C_PORT_0_USB3_NUM 3
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#define TYPE_C_PORT_1_USB3_NUM 2
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#endif /* BOARD_TGLRVPU_ITE */
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/* Config BB retimer */
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#define CONFIG_USB_PD_RETIMER_INTEL_BB
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/* Thermal configs */
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/* I2C ports */
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#define CONFIG_IT83XX_SMCLK2_ON_GPC7
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#define I2C_PORT_CHARGER IT83XX_I2C_CH_B
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#define I2C_PORT_BATTERY IT83XX_I2C_CH_B
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#define I2C_PORT_PCA9555_BOARD_ID_GPIO IT83XX_I2C_CH_B
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#define I2C_PORT_PORT80 IT83XX_I2C_CH_B
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#define I2C_PORT0_BB_RETIMER IT83XX_I2C_CH_E
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#define I2C_PORT1_BB_RETIMER IT83XX_I2C_CH_E
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#define I2C_ADDR_PCA9555_BOARD_ID_GPIO 0x22
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#define PORT80_I2C_ADDR MAX695X_I2C_ADDR1_FLAGS
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#ifdef BOARD_TGLRVPU_ITE
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#define I2C_PORT0_BB_RETIMER_ADDR 0x42
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#define I2C_PORT1_BB_RETIMER_ADDR 0x43
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/* BB retimer nvm is shared between port 0 & 1 */
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#define BB_RETIMER_SHARED_NVM 1
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#else /* BOARD_TGLRVPY_ITE */
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#define I2C_PORT0_BB_RETIMER_ADDR 0x42
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#define I2C_PORT1_BB_RETIMER_ADDR 0x41
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/* BB retimers have respective nvm for port 0 & 1 */
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#define BB_RETIMER_SHARED_NVM 0
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#endif /* BOARD_TGLRVPU_ITE */
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#define USB_PORT0_BB_RETIMER_SHARED_NVM BB_RETIMER_SHARED_NVM
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#define USB_PORT1_BB_RETIMER_SHARED_NVM BB_RETIMER_SHARED_NVM
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/* Enabling SOP* communication */
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#define CONFIG_USB_PD_DECODE_SOP
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#ifndef __ASSEMBLER__
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enum tglrvp_charge_ports {
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TYPE_C_PORT_0,
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TYPE_C_PORT_1,
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};
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enum tglrvp_i2c_channel {
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I2C_CHAN_FLASH,
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I2C_CHAN_BATT_CHG,
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I2C_CHAN_RETIMER,
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I2C_CHAN_COUNT,
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};
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/* Define max power */
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#define PD_MAX_POWER_MW 60000
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int board_get_version(void);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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