61 lines
1.2 KiB
C
61 lines
1.2 KiB
C
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/* Copyright 2017 The Chromium OS Authors. All rights reserved
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Register map for MCHP MEC processor
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*/
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/** @file qmpis_chip.h
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*MCHP MEC Quad SPI Master
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*/
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/** @defgroup MCHP MEC qmspi
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*/
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#ifndef _SPI_CHIP_H
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#define _SPI_CHIP_H
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#include <stdint.h>
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#include <stddef.h>
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/* struct spi_device_t */
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#include "spi.h"
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#define SPI_DMA_OPTION_RD 0
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#define SPI_DMA_OPTION_WR 1
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/*
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* bits[3:0] = controller instance
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* bits[7:4] = controller family
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* 0 = QMSPI, 1 = GPSPI
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*/
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#define QMSPI0_PORT 0x00
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#define GPSPI0_PORT 0x10
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#define GPSPI1_PORT 0x11
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#define QMSPI_CLASS0 0
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#define GPSPI_CLASS0 1
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#define QMSPI_CLASS (0 << 4)
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#define GPSPI_CLASS BIT(4)
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#define QMSPI_CTRL0 0
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#define GPSPI_CTRL0 0
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#define GPSPI_CTRL1 1
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/*
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* Encode zero based controller class and instance values
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* in port value of spi_device_t.
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*/
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#define SPI_CTRL_ID(c, i) (((c & 0xf) << 4) + (i & 0xf))
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/*
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* helper to return pointer to QMSPI or GPSPI struct dma_option
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*/
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const void *spi_dma_option(const struct spi_device_t *spi_device,
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int is_tx);
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#endif /* #ifndef _QMSPI_CHIP_H */
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/** @}
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*/
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