124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
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/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Watchdog driver */
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#include "hooks.h"
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#include "registers.h"
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#include "task.h"
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#include "watchdog.h"
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#include "tfdp_chip.h"
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void watchdog_reload(void)
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{
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MCHP_WDG_KICK = 1;
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#ifdef CONFIG_WATCHDOG_HELP
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/* Reload the auxiliary timer */
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MCHP_TMR16_CTL(0) &= ~BIT(5);
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MCHP_TMR16_CNT(0) = CONFIG_AUX_TIMER_PERIOD_MS;
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MCHP_TMR16_CTL(0) |= BIT(5);
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#endif
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}
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DECLARE_HOOK(HOOK_TICK, watchdog_reload, HOOK_PRIO_DEFAULT);
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int watchdog_init(void)
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{
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#ifdef CONFIG_WATCHDOG_HELP
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uint32_t val;
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/*
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* Watchdog does not warn us before expiring. Let's use a 16-bit
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* timer as an auxiliary timer.
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*/
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/* Clear 16-bit basic timer 0 PCR sleep enable */
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MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_BTMR16_0);
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/* Stop the auxiliary timer if it's running */
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MCHP_TMR16_CTL(0) &= ~BIT(5);
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/* Enable auxiliary timer */
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MCHP_TMR16_CTL(0) |= BIT(0);
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val = MCHP_TMR16_CTL(0);
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/* Pre-scale = 48000 -> 1kHz -> Period = 1ms */
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val = (val & 0xffff) | (47999 << 16);
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/* No auto restart */
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val &= ~BIT(3);
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/* Count down */
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val &= ~BIT(2);
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MCHP_TMR16_CTL(0) = val;
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/* Enable interrupt from auxiliary timer */
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MCHP_TMR16_IEN(0) |= 1;
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task_enable_irq(MCHP_IRQ_TIMER16_0);
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MCHP_INT_ENABLE(MCHP_TMR16_GIRQ) = MCHP_TMR16_GIRQ_BIT(0);
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/* Load and start the auxiliary timer */
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MCHP_TMR16_CNT(0) = CONFIG_AUX_TIMER_PERIOD_MS;
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MCHP_TMR16_CNT(0) |= BIT(5);
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#endif
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/* Clear WDT PCR sleep enable */
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MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_WDT);
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/* Set timeout. It takes 1007us to decrement WDG_CNT by 1. */
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MCHP_WDG_LOAD = CONFIG_WATCHDOG_PERIOD_MS * 1000 / 1007;
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/* Start watchdog */
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#ifdef CONFIG_CHIPSET_DEBUG
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/* WDT will not count if JTAG TRST# is pulled high by JTAG cable */
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MCHP_WDG_CTL = BIT(4) | BIT(0);
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#else
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MCHP_WDG_CTL |= 1;
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#endif
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return EC_SUCCESS;
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}
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#ifdef CONFIG_WATCHDOG_HELP
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void __keep watchdog_check(uint32_t excep_lr, uint32_t excep_sp)
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{
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trace0(0, WDT, 0, "Watchdog check from 16-bit basic timer0 ISR");
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/* Clear status */
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MCHP_TMR16_STS(0) |= 1;
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/* clear aggregator status */
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MCHP_INT_SOURCE(MCHP_TMR16_GIRQ) = MCHP_TMR16_GIRQ_BIT(0);
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watchdog_trace(excep_lr, excep_sp);
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}
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void
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IRQ_HANDLER(MCHP_IRQ_TIMER16_0)(void) __keep __attribute__((naked));
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void IRQ_HANDLER(MCHP_IRQ_TIMER16_0)(void)
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{
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/* Naked call so we can extract raw LR and SP */
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asm volatile("mov r0, lr\n"
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"mov r1, sp\n"
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/*
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* Must push registers in pairs to keep 64-bit aligned
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* stack for ARM EABI. This also conveninently saves
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* R0=LR so we can pass it to task_resched_if_needed.
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*/
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"push {r0, lr}\n"
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"bl watchdog_check\n"
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"pop {r0, lr}\n"
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"b task_resched_if_needed\n");
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}
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/*
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* Put the watchdog at the highest interrupt priority.
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*/
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const struct irq_priority __keep IRQ_PRIORITY(MEC1322_IRQ_TIMER16_0)
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__attribute__((section(".rodata.irqprio")))
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= {MCHP_IRQ_TIMER16_0, 0};
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#endif
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