56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
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/* Copyright 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* STM32-specific ADC module for Chrome EC */
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#ifndef __CROS_EC_ADC_CHIP_H
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#define __CROS_EC_ADC_CHIP_H
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#include "stdint.h"
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enum stm32_adc_smpr {
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STM32_ADC_SMPR_DEFAULT = 0,
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STM32_ADC_SMPR_1_5_CY,
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STM32_ADC_SMPR_7_5_CY,
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STM32_ADC_SMPR_13_5_CY,
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STM32_ADC_SMPR_28_5_CY,
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STM32_ADC_SMPR_41_5_CY,
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STM32_ADC_SMPR_55_5_CY,
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STM32_ADC_SMPR_71_5_CY,
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STM32_ADC_SMPR_239_5_CY,
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STM32_ADC_SMPR_COUNT,
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};
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/* Data structure to define ADC channels. */
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struct adc_t {
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const char *name;
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int factor_mul;
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int factor_div;
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int shift;
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int channel;
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#ifdef CHIP_FAMILY_STM32F0
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enum stm32_adc_smpr sample_rate; /* Sampling Rate of the channel */
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#endif
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};
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/*
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* Boards must provide this list of ADC channel definitions. This must match
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* the enum adc_channel list provided by the board. Also, for STM32F0, this
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* must be ordered by AIN ID.
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*/
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extern const struct adc_t adc_channels[];
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/* Disable ADC module when we don't need it anymore. */
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void adc_disable(void);
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/* Minimum and maximum values returned by adc_read_channel(). */
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#define ADC_READ_MIN 0
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#define ADC_READ_MAX 4095
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/* Just plain id mapping for code readability */
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#define STM32_AIN(x) (x)
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#endif /* __CROS_EC_ADC_CHIP_H */
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