45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
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/* Copyright 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Memory mapping */
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#define CONFIG_FLASH_SIZE 0x00020000
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#define CONFIG_FLASH_BANK_SIZE 0x1000
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#define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */
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/*
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* TODO(crosbug.com/p/23805): Technically we can write in word-mode (4 bytes at
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* a time), but that's really slow, and older host interfaces which can't ask
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* about the ideal size would then end up writing in that mode instead of the
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* faster page mode. So lie about the write size for now. Once all software
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* (flashrom, u-boot, ectool) which cares has been updated to know about ver.1
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* of EC_CMD_GET_FLASH_INFO, we can remove this workaround.
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*/
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#define CONFIG_FLASH_WRITE_SIZE 0x0080
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/* Ideal write size in page-mode */
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#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080
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#define CONFIG_RAM_BASE 0x20000000
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#define CONFIG_RAM_SIZE 0x00004000
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/* Number of IRQ vectors on the NVIC */
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#define CONFIG_IRQ_COUNT 45
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/* Lots of RAM, so use bigger UART buffer */
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 2048
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/* Use DMA for UART receive */
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#define CONFIG_UART_RX_DMA
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/* Flash erases to 0, not 1 */
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#define CONFIG_FLASH_ERASED_VALUE32 0
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/* USB packet ram config */
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#define CONFIG_USB_RAM_BASE 0x40006000
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#define CONFIG_USB_RAM_SIZE 512
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#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
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#define CONFIG_USB_RAM_ACCESS_SIZE 4
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