153 lines
4.3 KiB
C
153 lines
4.3 KiB
C
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/* Copyright 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_CONFIG_CHIP_H
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#define __CROS_EC_CONFIG_CHIP_H
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#ifdef CHIP_FAMILY_STM32F0
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/* CPU core BFD configuration */
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#include "core/cortex-m0/config_core.h"
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/* IRQ priorities */
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#define STM32_IRQ_EXT0_1_PRIORITY 1
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#define STM32_IRQ_EXT2_3_PRIORITY 1
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#define STM32_IRQ_EXTI4_15_PRIORITY 1
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#else
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/* CPU core BFD configuration */
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#include "core/cortex-m/config_core.h"
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#endif
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/* Default to UART 1 for EC console */
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#define CONFIG_UART_CONSOLE 1
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/* Use variant specific configuration for flash / UART / IRQ */
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/* STM32F03X8 it itself a variant of STM32F03X with non-default flash sizes */
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#ifdef CHIP_VARIANT_STM32F03X8
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#define CHIP_VARIANT_STM32F03X
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#endif
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/* Number of I2C ports, can be overridden in variant */
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#define I2C_PORT_COUNT 2
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#if defined(CHIP_VARIANT_STM32L476)
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#include "config-stm32l476.h"
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#elif defined(CHIP_VARIANT_STM32L15X)
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#include "config-stm32l15x.h"
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#elif defined(CHIP_VARIANT_STM32L100)
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#include "config-stm32l100.h"
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#elif defined(CHIP_VARIANT_STM32L442)
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#include "config-stm32l442.h"
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#elif defined(CHIP_VARIANT_STM32F76X)
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#include "config-stm32f76x.h"
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#elif defined(CHIP_FAMILY_STM32F4)
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/* STM32F4 family */
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#include "config-stm32f446.h"
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#elif defined(CHIP_VARIANT_STM32F373)
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#include "config-stm32f373.h"
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#elif defined(CHIP_VARIANT_STM32F09X)
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/* STM32F09xx */
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#include "config-stm32f09x.h"
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#elif defined(CHIP_VARIANT_STM32F07X) || defined(CHIP_VARIANT_STM32F070)
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/* STM32F07xx */
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#include "config-stm32f07x.h"
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#elif defined(CHIP_VARIANT_STM32F05X)
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/* STM32F05xx */
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#include "config-stm32f05x.h"
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#elif defined(CHIP_VARIANT_STM32F03X)
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/* STM32F03x */
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#include "config-stm32f03x.h"
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#elif defined(CHIP_VARIANT_STM32H7X3)
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#include "config-stm32h7x3.h"
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#else
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#error "Unsupported chip variant"
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#endif
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#define CONFIG_PROGRAM_MEMORY_BASE 0x08000000
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/* Memory-mapped internal flash */
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#define CONFIG_INTERNAL_STORAGE
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#define CONFIG_MAPPED_STORAGE
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/* Program is run directly from storage */
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#define CONFIG_MAPPED_STORAGE_BASE CONFIG_PROGRAM_MEMORY_BASE
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#if !defined(CHIP_FAMILY_STM32F4) && \
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!defined(CHIP_FAMILY_STM32F7) && \
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!defined(CHIP_FAMILY_STM32H7) && \
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!defined(CHIP_VARIANT_STM32F09X)
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/* Compute the rest of the flash params from these */
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#include "config_std_internal_flash.h"
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#endif
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/* Additional special purpose regions (USB RAM and other special SRAMs) */
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#define CONFIG_CHIP_MEMORY_REGIONS
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/* System stack size */
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#if defined(CHIP_VARIANT_STM32F05X)
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#define CONFIG_STACK_SIZE 768
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#else
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#define CONFIG_STACK_SIZE 1024
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#endif
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/* Idle task stack size */
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#define IDLE_TASK_STACK_SIZE 256
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/* Smaller task stack size */
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#define SMALLER_TASK_STACK_SIZE 384
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/* Default task stack size */
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#define TASK_STACK_SIZE 488
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/* Larger task stack size, for hook task */
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#define LARGER_TASK_STACK_SIZE 640
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/* Even bigger */
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#define VENTI_TASK_STACK_SIZE 768
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/* Interval between HOOK_TICK notifications */
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#define HOOK_TICK_INTERVAL_MS 500
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#define HOOK_TICK_INTERVAL (HOOK_TICK_INTERVAL_MS * MSEC)
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/*
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* Use a timer to print a watchdog warning event before the actual watchdog
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* timer fires. This is needed on STM32, where the independent watchdog has no
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* early warning feature and the windowed watchdog has a very short period.
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*/
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#define CONFIG_WATCHDOG_HELP
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/* Use DMA */
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#define CONFIG_DMA
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/* STM32 features RTC (optional feature) */
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#define CONFIG_RTC
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/* Number of peripheral request signals per DMA channel */
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#define STM32_DMA_PERIPHERALS_PER_CHANNEL 4
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/*
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* Use DMA for UART transmit for all platforms. DMA for UART receive is
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* enabled on a per-chip basis because it doesn't seem to work reliably on
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* STM32F (see crosbug.com/p/24141).
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*/
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#define CONFIG_UART_TX_DMA
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#ifndef CHIP_FAMILY_STM32H7
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/* Flash protection applies to the next boot, not the current one */
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#define CONFIG_FLASH_PROTECT_NEXT_BOOT
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#endif /* !CHIP_FAMILY_STM32H7 */
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/* Chip needs to do custom pre-init */
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#define CONFIG_CHIP_PRE_INIT
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#define GPIO_NAME_BY_PIN(port, index) #port#index
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#define GPIO_PIN(port, index) GPIO_##port, BIT(index)
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#define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m)
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/* Prescaler values for PLL. Currently used only by STM32L476. */
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#define STM32_PLLM 0
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#define STM32_PLLN 0
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#define STM32_PLLR 0
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#endif /* __CROS_EC_CONFIG_CHIP_H */
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