116 lines
2.2 KiB
C
116 lines
2.2 KiB
C
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Synchronous UART debug printf */
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#include "common.h"
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#include "console.h"
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#include "gpio.h"
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#include "printf.h"
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#include "registers.h"
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#include "util.h"
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static int debug_txchar(void *context, int c)
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{
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if (c == '\n') {
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while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TXE))
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;
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STM32_USART_TDR(UARTN_BASE) = '\r';
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}
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/* Wait for space to transmit */
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while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TXE))
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;
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STM32_USART_TDR(UARTN_BASE) = c;
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return 0;
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}
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void debug_printf(const char *format, ...)
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{
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va_list args;
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va_start(args, format);
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vfnprintf(debug_txchar, NULL, format, args);
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va_end(args);
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}
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#ifdef CONFIG_COMMON_RUNTIME
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void cflush(void)
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{
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/* Wait for transmit complete */
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while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TC))
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;
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}
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int cputs(enum console_channel channel, const char *outstr)
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{
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debug_printf(outstr);
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return 0;
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}
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void panic_puts(const char *outstr)
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{
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debug_printf(outstr);
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cflush();
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}
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int cprintf(enum console_channel channel, const char *format, ...)
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{
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va_list args;
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va_start(args, format);
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vfnprintf(debug_txchar, NULL, format, args);
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va_end(args);
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return 0;
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}
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void panic_printf(const char *format, ...)
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{
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va_list args;
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va_start(args, format);
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vfnprintf(debug_txchar, NULL, format, args);
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va_end(args);
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cflush();
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}
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int cprints(enum console_channel channel, const char *format, ...)
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{
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va_list args;
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va_start(args, format);
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vfnprintf(debug_txchar, NULL, format, args);
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va_end(args);
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debug_printf("\n");
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return 0;
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}
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void uart_init(void)
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{
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/* Enable USART1 clock */
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STM32_RCC_APB2ENR |= STM32_RCC_PB2_USART1;
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/* set baudrate */
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STM32_USART_BRR(UARTN_BASE) =
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DIV_ROUND_NEAREST(CPU_CLOCK, CONFIG_UART_BAUD_RATE);
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/* UART enabled, 8 Data bits, oversampling x16, no parity */
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STM32_USART_CR1(UARTN_BASE) =
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STM32_USART_CR1_UE | STM32_USART_CR1_TE | STM32_USART_CR1_RE;
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/* 1 stop bit, no fancy stuff */
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STM32_USART_CR2(UARTN_BASE) = 0x0000;
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/* DMA disabled, special modes disabled, error interrupt disabled */
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STM32_USART_CR3(UARTN_BASE) = 0x0000;
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/* Configure GPIOs */
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gpio_config_module(MODULE_UART, 1);
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}
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#endif
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