52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* GPIO module for Chrome EC */
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#include "clock.h"
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#include "common.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "registers.h"
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#include "task.h"
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#include "util.h"
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void gpio_enable_clocks(void)
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{
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/*
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* Enable all GPIOs clocks
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*
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* TODO(crosbug.com/p/23770): only enable the banks we need to,
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* and support disabling some of them in low-power idle.
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*/
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STM32_RCC_AHBENR |= 0x7e0000;
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/* Delay 1 AHB clock cycle after the clock is enabled */
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clock_wait_bus_cycles(BUS_AHB, 1);
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}
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static void gpio_init(void)
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{
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/* Enable IRQs now that pins are set up */
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task_enable_irq(STM32_IRQ_EXTI0);
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task_enable_irq(STM32_IRQ_EXTI1);
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task_enable_irq(STM32_IRQ_EXTI2);
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task_enable_irq(STM32_IRQ_EXTI3);
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task_enable_irq(STM32_IRQ_EXTI4);
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task_enable_irq(STM32_IRQ_EXTI9_5);
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task_enable_irq(STM32_IRQ_EXTI15_10);
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}
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DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT);
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DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1);
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DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1);
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#include "gpio-f0-l.c"
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