241 lines
8.1 KiB
C
241 lines
8.1 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_USB_SPI_H
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#define __CROS_EC_USB_SPI_H
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/* STM32 USB SPI driver for Chrome EC */
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#include "compile_time_macros.h"
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#include "hooks.h"
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#include "usb_descriptor.h"
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#include "usb_hw.h"
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/*
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* Command:
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* +------------------+-----------------+------------------------+
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* | write count : 1B | read count : 1B | write payload : <= 62B |
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* +------------------+-----------------+------------------------+
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*
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* write count: 1 byte, zero based count of bytes to write
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*
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* read count: 1 byte, zero based count of bytes to read
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*
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* write payload: up to 62 bytes of data to write, length must match
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* write count
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*
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* Response:
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* +-------------+-----------------------+
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* | status : 2B | read payload : <= 62B |
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* +-------------+-----------------------+
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*
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* status: 2 byte status
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* 0x0000: Success
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* 0x0001: SPI timeout
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* 0x0002: Busy, try again
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* This can happen if someone else has acquired the shared memory
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* buffer that the SPI driver uses as /dev/null
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* 0x0003: Write count invalid (> 62 bytes, or mismatch with payload)
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* 0x0004: Read count invalid (> 62 bytes)
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* 0x0005: The SPI bridge is disabled.
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* 0x8000: Unknown error mask
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* The bottom 15 bits will contain the bottom 15 bits from the EC
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* error code.
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*
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* read payload: up to 62 bytes of data read from SPI, length will match
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* requested read count
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*/
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enum usb_spi_error {
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USB_SPI_SUCCESS = 0x0000,
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USB_SPI_TIMEOUT = 0x0001,
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USB_SPI_BUSY = 0x0002,
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USB_SPI_WRITE_COUNT_INVALID = 0x0003,
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USB_SPI_READ_COUNT_INVALID = 0x0004,
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USB_SPI_DISABLED = 0x0005,
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USB_SPI_UNKNOWN_ERROR = 0x8000,
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};
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enum usb_spi_request {
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USB_SPI_REQ_ENABLE = 0x0000,
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USB_SPI_REQ_DISABLE = 0x0001,
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};
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#define USB_SPI_MAX_WRITE_COUNT 62
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#define USB_SPI_MAX_READ_COUNT 62
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BUILD_ASSERT(USB_MAX_PACKET_SIZE == (1 + 1 + USB_SPI_MAX_WRITE_COUNT));
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BUILD_ASSERT(USB_MAX_PACKET_SIZE == (2 + USB_SPI_MAX_READ_COUNT));
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struct usb_spi_state {
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/*
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* The SPI bridge must be enabled both locally and by the host to allow
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* access to the SPI device. The enabled_host flag is set and cleared
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* by sending USB_SPI_REQ_ENABLE and USB_SPI_REQ_DISABLE to the device
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* control endpoint. The enabled_device flag is set by calling
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* usb_spi_enable.
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*/
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int enabled_host;
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int enabled_device;
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/*
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* The current enabled state. This is only updated in the deferred
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* callback. Whenever either of the host or device specific enable
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* flags is changed the deferred callback is queued, and it will check
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* their combined state against this flag. If the combined state is
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* different, then one of usb_spi_board_enable or usb_spi_board_disable
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* is called and this flag is updated. This ensures that the board
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* specific state update routines are only called from the deferred
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* callback.
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*/
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int enabled;
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};
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/*
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* Compile time Per-USB gpio configuration stored in flash. Instances of this
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* structure are provided by the user of the USB gpio. This structure binds
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* together all information required to operate a USB gpio.
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*/
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struct usb_spi_config {
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/*
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* In RAM state of the USB SPI bridge.
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*/
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struct usb_spi_state *state;
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/*
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* Interface and endpoint indicies.
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*/
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int interface;
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int endpoint;
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/*
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* Deferred function to call to handle SPI request.
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*/
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const struct deferred_data *deferred;
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/*
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* Pointers to USB packet RAM and bounce buffer.
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*/
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uint16_t *buffer;
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usb_uint *rx_ram;
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usb_uint *tx_ram;
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};
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/*
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* Convenience macro for defining a USB SPI bridge driver.
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*
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* NAME is used to construct the names of the trampoline functions and the
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* usb_spi_config struct, the latter is just called NAME.
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*
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* INTERFACE is the index of the USB interface to associate with this
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* SPI driver.
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*
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* ENDPOINT is the index of the USB bulk endpoint used for receiving and
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* transmitting bytes.
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*/
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#define USB_SPI_CONFIG(NAME, \
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INTERFACE, \
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ENDPOINT) \
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static uint16_t CONCAT2(NAME, _buffer_)[USB_MAX_PACKET_SIZE / 2]; \
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static usb_uint CONCAT2(NAME, _ep_rx_buffer_)[USB_MAX_PACKET_SIZE / 2] __usb_ram; \
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static usb_uint CONCAT2(NAME, _ep_tx_buffer_)[USB_MAX_PACKET_SIZE / 2] __usb_ram; \
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static void CONCAT2(NAME, _deferred_)(void); \
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DECLARE_DEFERRED(CONCAT2(NAME, _deferred_)); \
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struct usb_spi_state CONCAT2(NAME, _state_) = { \
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.enabled_host = 0, \
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.enabled_device = 0, \
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.enabled = 0, \
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}; \
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struct usb_spi_config const NAME = { \
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.state = &CONCAT2(NAME, _state_), \
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.interface = INTERFACE, \
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.endpoint = ENDPOINT, \
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.deferred = &CONCAT2(NAME, _deferred__data), \
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.buffer = CONCAT2(NAME, _buffer_), \
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.rx_ram = CONCAT2(NAME, _ep_rx_buffer_), \
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.tx_ram = CONCAT2(NAME, _ep_tx_buffer_), \
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}; \
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const struct usb_interface_descriptor \
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USB_IFACE_DESC(INTERFACE) = { \
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.bLength = USB_DT_INTERFACE_SIZE, \
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.bDescriptorType = USB_DT_INTERFACE, \
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.bInterfaceNumber = INTERFACE, \
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.bAlternateSetting = 0, \
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.bNumEndpoints = 2, \
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.bInterfaceClass = USB_CLASS_VENDOR_SPEC, \
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.bInterfaceSubClass = USB_SUBCLASS_GOOGLE_SPI, \
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.bInterfaceProtocol = USB_PROTOCOL_GOOGLE_SPI, \
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.iInterface = 0, \
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}; \
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const struct usb_endpoint_descriptor \
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USB_EP_DESC(INTERFACE, 0) = { \
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.bLength = USB_DT_ENDPOINT_SIZE, \
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.bDescriptorType = USB_DT_ENDPOINT, \
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.bEndpointAddress = 0x80 | ENDPOINT, \
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.bmAttributes = 0x02 /* Bulk IN */, \
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.wMaxPacketSize = USB_MAX_PACKET_SIZE, \
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.bInterval = 10, \
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}; \
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const struct usb_endpoint_descriptor \
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USB_EP_DESC(INTERFACE, 1) = { \
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.bLength = USB_DT_ENDPOINT_SIZE, \
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.bDescriptorType = USB_DT_ENDPOINT, \
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.bEndpointAddress = ENDPOINT, \
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.bmAttributes = 0x02 /* Bulk OUT */, \
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.wMaxPacketSize = USB_MAX_PACKET_SIZE, \
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.bInterval = 0, \
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}; \
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static void CONCAT2(NAME, _ep_tx_) (void) { usb_spi_tx (&NAME); } \
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static void CONCAT2(NAME, _ep_rx_) (void) { usb_spi_rx (&NAME); } \
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static void CONCAT2(NAME, _ep_event_)(enum usb_ep_event evt) \
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{ \
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usb_spi_event(&NAME, evt); \
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} \
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USB_DECLARE_EP(ENDPOINT, \
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CONCAT2(NAME, _ep_tx_), \
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CONCAT2(NAME, _ep_rx_), \
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CONCAT2(NAME, _ep_event_)); \
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static int CONCAT2(NAME, _interface_)(usb_uint *rx_buf, \
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usb_uint *tx_buf) \
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{ return usb_spi_interface(&NAME, rx_buf, tx_buf); } \
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USB_DECLARE_IFACE(INTERFACE, \
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CONCAT2(NAME, _interface_)); \
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static void CONCAT2(NAME, _deferred_)(void) \
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{ usb_spi_deferred(&NAME); }
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/*
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* Handle SPI request in a deferred callback.
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*/
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void usb_spi_deferred(struct usb_spi_config const *config);
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/*
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* Set the enable state for the USB-SPI bridge.
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*
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* The bridge must be enabled from both the host and device side
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* before the SPI bus is usable. This allows the bridge to be
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* available for host tools to use without forcing the device to
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* disconnect or disable whatever else might be using the SPI bus.
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*/
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void usb_spi_enable(struct usb_spi_config const *config, int enabled);
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/*
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* These functions are used by the trampoline functions defined above to
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* connect USB endpoint events with the generic USB GPIO driver.
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*/
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void usb_spi_tx(struct usb_spi_config const *config);
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void usb_spi_rx(struct usb_spi_config const *config);
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void usb_spi_event(struct usb_spi_config const *config, enum usb_ep_event evt);
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int usb_spi_interface(struct usb_spi_config const *config,
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usb_uint *rx_buf,
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usb_uint *tx_buf);
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/*
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* These functions should be implemented by the board to provide any board
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* specific operations required to enable or disable access to the SPI device.
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*/
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void usb_spi_board_enable(struct usb_spi_config const *config);
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void usb_spi_board_disable(struct usb_spi_config const *config);
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#endif /* __CROS_EC_USB_SPI_H */
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