134 lines
4.2 KiB
C
134 lines
4.2 KiB
C
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/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* LSM6DS0 accelerometer and gyro module for Chrome EC */
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#ifndef __CROS_EC_ACCELGYRO_LSM6DS0_H
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#define __CROS_EC_ACCELGYRO_LSM6DS0_H
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#include "accelgyro.h"
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#include "task.h"
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/*
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* 7-bit address is 110101Xb. Where 'X' is determined
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* by the voltage on the ADDR pin.
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*/
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#define LSM6DS0_ADDR0_FLAGS 0x6a
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#define LSM6DS0_ADDR1_FLAGS 0x6b
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/* who am I */
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#define LSM6DS0_WHO_AM_I 0x68
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/* Chip specific registers. */
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#define LSM6DS0_ACT_THS 0x04
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#define LSM6DS0_ACT_DUR 0x05
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#define LSM6DS0_INT_GEN_CFG_XL 0x06
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#define LSM6DS0_INT_GEN_THS_X_XL 0x07
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#define LSM6DS0_INT_GEN_THS_Y_XL 0x08
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#define LSM6DS0_INT_GEN_THS_Z_XL 0x09
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#define LSM6DS0_INT_GEN_DUR_XL 0x0a
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#define LSM6DS0_REFERENCE_G 0x0b
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#define LSM6DS0_INT_CTRL 0x0c
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#define LSM6DS0_WHO_AM_I_REG 0x0f
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#define LSM6DS0_CTRL_REG1_G 0x10
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#define LSM6DS0_CTRL_REG2_G 0x11
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#define LSM6DS0_CTRL_REG3_G 0x12
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#define LSM6DS0_ORIENT_CFG_G 0x13
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#define LSM6DS0_INT_GEN_SRC_G 0x14
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#define LSM6DS0_OUT_TEMP_L 0x15
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#define LSM6DS0_OUT_TEMP_H 0x16
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#define LSM6DS0_OUT_X_L_G 0x18
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#define LSM6DS0_OUT_X_H_G 0x19
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#define LSM6DS0_OUT_Y_L_G 0x1a
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#define LSM6DS0_OUT_Y_H_G 0x1b
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#define LSM6DS0_OUT_Z_L_G 0x1c
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#define LSM6DS0_OUT_Z_H_G 0x1d
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#define LSM6DS0_CTRL_REG4 0x1e
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#define LSM6DS0_CTRL_REG5_XL 0x1f
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#define LSM6DS0_CTRL_REG6_XL 0x20
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#define LSM6DS0_CTRL_REG7_XL 0x21
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#define LSM6DS0_CTRL_REG8 0x22
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#define LSM6DS0_CTRL_REG9 0x23
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#define LSM6DS0_CTRL_REG10 0x24
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#define LSM6DS0_INT_GEN_SRC_XL 0x26
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#define LSM6DS0_STATUS_REG 0x27
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#define LSM6DS0_OUT_X_L_XL 0x28
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#define LSM6DS0_OUT_X_H_XL 0x29
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#define LSM6DS0_OUT_Y_L_XL 0x2a
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#define LSM6DS0_OUT_Y_H_XL 0x2b
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#define LSM6DS0_OUT_Z_L_XL 0x2c
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#define LSM6DS0_OUT_Z_H_XL 0x2d
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#define LSM6DS0_FIFO_CTRL 0x2e
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#define LSM6DS0_FIFO_SRC 0x2f
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#define LSM6DS0_INT_GEN_CFG_G 0x30
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#define LSM6DS0_INT_GEN_THS_XH_G 0x31
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#define LSM6DS0_INT_GEN_THS_XL_G 0x32
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#define LSM6DS0_INT_GEN_THS_YH_G 0x33
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#define LSM6DS0_INT_GEN_THS_YL_G 0x34
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#define LSM6DS0_INT_GEN_THS_ZH_G 0x35
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#define LSM6DS0_INT_GEN_THS_ZL_G 0x36
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#define LSM6DS0_INT_GEN_DUR_G 0x37
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#define LSM6DS0_DPS_SEL_245 (0 << 3)
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#define LSM6DS0_DPS_SEL_500 BIT(3)
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#define LSM6DS0_DPS_SEL_1000 (2 << 3)
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#define LSM6DS0_DPS_SEL_2000 (3 << 3)
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#define LSM6DS0_GSEL_2G (0 << 3)
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#define LSM6DS0_GSEL_4G (2 << 3)
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#define LSM6DS0_GSEL_8G (3 << 3)
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#define LSM6DS0_RANGE_MASK (3 << 3)
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#define LSM6DS0_ODR_PD (0 << 5)
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#define LSM6DS0_ODR_10HZ BIT(5)
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#define LSM6DS0_ODR_15HZ BIT(5)
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#define LSM6DS0_ODR_50HZ (2 << 5)
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#define LSM6DS0_ODR_59HZ (2 << 5)
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#define LSM6DS0_ODR_119HZ (3 << 5)
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#define LSM6DS0_ODR_238HZ (4 << 5)
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#define LSM6DS0_ODR_476HZ (5 << 5)
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#define LSM6DS0_ODR_952HZ (6 << 5)
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#define LSM6DS0_ODR_MASK (7 << 5)
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/*
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* Register : STATUS_REG
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* Address : 0X27
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*/
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enum lsm6ds0_status {
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LSM6DS0_STS_DOWN = 0x00,
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LSM6DS0_STS_XLDA_UP = 0x01,
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LSM6DS0_STS_GDA_UP = 0x02,
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};
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#define LSM6DS0_STS_XLDA_MASK 0x01
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#define LSM6DS0_STS_GDA_MASK 0x02
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/*
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* Register : CTRL_REG8
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* Address : 0X22
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* Bit Group Name: BDU
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*/
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enum lsm6ds0_bdu {
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LSM6DS0_BDU_DISABLE = 0x00,
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LSM6DS0_BDU_ENABLE = 0x40,
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};
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/* Sensor resolution in number of bits. This sensor has fixed resolution. */
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#define LSM6DS0_RESOLUTION 16
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/* Min and Max sampling frequency in mHz */
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#define LSM6DS0_ACCEL_MIN_FREQ 14900
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#define LSM6DS0_ACCEL_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(952000, 119000)
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#define LSM6DS0_GYRO_MIN_FREQ 14900
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#define LSM6DS0_GYRO_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(952000, 119000)
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extern const struct accelgyro_drv lsm6ds0_drv;
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struct lsm6ds0_data {
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struct accelgyro_saved_data_t base;
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int16_t offset[3];
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};
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#endif /* __CROS_EC_ACCELGYRO_LSM6DS0_H */
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