107 lines
2.6 KiB
C
107 lines
2.6 KiB
C
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/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* ITE IT8300 I/O Port expander driver header
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*/
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#ifndef __CROS_EC_IOEXPANDER_IT8300_H
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#define __CROS_EC_IOEXPANDER_IT8300_H
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#include "i2c.h"
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/* Gather Interrupt Status Register */
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#define IT8300_GISR 0x0
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/* Interrupt Status Registers */
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#define IT8300_ISR_A 0x6
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#define IT8300_ISR_B 0x7
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#define IT8300_ISR_C 0x28
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#define IT8300_ISR_D 0x2E
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#define IT8300_ISR_E 0x2F
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/* Port Data Register Groups */
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#define IT8300_PDGR_A 0x1
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#define IT8300_PDGR_B 0x2
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#define IT8300_PDGR_C 0x3
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#define IT8300_PDGR_D 0x4
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#define IT8300_PDGR_E 0x5
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/* GPIO Port Control n Registers */
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#define IT8300_GPCR_A0 0x10
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#define IT8300_GPCR_A1 0x11
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#define IT8300_GPCR_A2 0x12
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#define IT8300_GPCR_A3 0x13
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#define IT8300_GPCR_A4 0x14
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#define IT8300_GPCR_A5 0x15
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#define IT8300_GPCR_A6 0x16
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#define IT8300_GPCR_A7 0x17
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#define IT8300_GPCR_B0 0x18
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#define IT8300_GPCR_B1 0x19
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#define IT8300_GPCR_B2 0x1A
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#define IT8300_GPCR_B3 0x1B
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#define IT8300_GPCR_B4 0x1C
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#define IT8300_GPCR_B5 0x1D
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#define IT8300_GPCR_B6 0x1E
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#define IT8300_GPCR_C0 0x20
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#define IT8300_GPCR_C1 0x21
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#define IT8300_GPCR_C2 0x22
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#define IT8300_GPCR_C3 0x23
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#define IT8300_GPCR_C4 0x24
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#define IT8300_GPCR_C5 0x25
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#define IT8300_GPCR_C6 0x26
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#define IT8300_GPCR_D0 0x08
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#define IT8300_GPCR_D1 0x09
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#define IT8300_GPCR_D2 0x0A
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#define IT8300_GPCR_D3 0x0B
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#define IT8300_GPCR_D4 0x0C
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#define IT8300_GPCR_D5 0x0D
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#define IT8300_GPCR_E0 0x32
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#define IT8300_GPCR_E2 0x34
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#define IT8300_GPCR_E3 0x35
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#define IT8300_GPCR_E4 0x36
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#define IT8300_GPCR_E5 0x37
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#define IT8300_GPCR_E6 0x38
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#define IT8300_GPCR_GPI_MODE BIT(7)
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#define IT8300_GPCR_GP0_MODE BIT(6)
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#define IT8300_GPCR_PULL_UP_EN BIT(2)
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#define IT8300_GPCR_PULL_DN_EN BIT(1)
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/* EXGPIO Clear Alert */
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#define IT8300_ECA 0x30
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/* EXGPIO Alert Enable */
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#define IT8300_EAE 0x31
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/* Port Data Mirror Registers */
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#define IT8300_PDMRA_A 0x29
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#define IT8300_PDMRA_B 0x2A
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#define IT8300_PDMRA_C 0x2B
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#define IT8300_PDMRA_D 0x2C
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#define IT8300_PDMRA_E 0x2D
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/* Output Open-Drain Enable Registers */
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#define IT8300_OODER_A 0x39
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#define IT8300_OODER_B 0x3A
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#define IT8300_OODER_C 0x3B
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#define IT8300_OODER_D 0x3C
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#define IT8300_OODER_E 0x3D
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/* IT83200 Port GPIOs */
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#define IT8300_GPX_0 BIT(0)
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#define IT8300_GPX_1 BIT(1)
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#define IT8300_GPX_2 BIT(2)
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#define IT8300_GPX_3 BIT(3)
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#define IT8300_GPX_4 BIT(4)
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#define IT8300_GPX_5 BIT(5)
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#define IT8300_GPX_6 BIT(6)
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#define IT8300_GPX_7 BIT(7)
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#endif /* __CROS_EC_IOEXPANDER_IT8300_H */
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