32 lines
1017 B
C
32 lines
1017 B
C
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/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* ROHM BD99992GW PMIC register map.
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*/
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#ifndef __CROS_EC_PMIC_BD99992GW_H
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#define __CROS_EC_PMIC_BD99992GW_H
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#include "temp_sensor/bd99992gw.h"
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#define BD99992GW_REG_PWRSRCINT 0x04
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#define BD99992GW_REG_RESETIRQ1 0x08
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#define BD99992GW_REG_PBCONFIG 0x14
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#define BD99992GW_REG_PWRSTAT1 0x16
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#define BD99992GW_REG_PWRSTAT2 0x17
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#define BD99992GW_REG_VCCIOCNT 0x30
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#define BD99992GW_REG_V5ADS3CNT 0x31
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#define BD99992GW_REG_V18ACNT 0x34
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#define BD99992GW_REG_V100ACNT 0x37
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#define BD99992GW_REG_V085ACNT 0x38
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#define BD99992GW_REG_VRMODECTRL 0x3b
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#define BD99992GW_REG_DISCHGCNT1 0x3c
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#define BD99992GW_REG_DISCHGCNT2 0x3d
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#define BD99992GW_REG_DISCHGCNT3 0x3e
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#define BD99992GW_REG_DISCHGCNT4 0x3f
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#define BD99992GW_REG_SDWNCTRL 0x49
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#define BD99992GW_SDWNCTRL_SWDN BIT(0) /* SWDN mask */
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#endif /* __CROS_EC_PMIC_BD99992GW_H */
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