169 lines
4.7 KiB
C
169 lines
4.7 KiB
C
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/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* TI SN5S330 Type-C Power Path Controller */
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#ifndef __CROS_EC_SN5S330_H
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#define __CROS_EC_SN5S330_H
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#include "common.h"
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struct sn5s330_config {
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uint8_t i2c_port;
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uint8_t i2c_addr_flags;
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};
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extern const struct sn5s330_config sn5s330_chips[];
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extern const unsigned int sn5s330_cnt;
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/* Power Path Indices */
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enum sn5s330_pp_idx {
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SN5S330_PP1,
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SN5S330_PP2,
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SN5S330_PP_COUNT,
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};
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#define SN5S330_ADDR0_FLAGS 0x40
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#define SN5S330_ADDR1_FLAGS 0x41
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#define SN5S330_ADDR2_FLAGS 0x42
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#define SN5S330_ADDR3_FLAGS 0x43
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#define SN5S330_FUNC_SET1 0x50
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#define SN5S330_FUNC_SET2 0x51
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#define SN5S330_FUNC_SET3 0x52
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#define SN5S330_FUNC_SET4 0x53
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#define SN5S330_FUNC_SET5 0x54
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#define SN5S330_FUNC_SET6 0x55
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#define SN5S330_FUNC_SET7 0x56
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#define SN5S330_FUNC_SET8 0x57
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#define SN5S330_FUNC_SET9 0x58
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#define SN5S330_FUNC_SET10 0x59
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#define SN5S330_FUNC_SET11 0x5A
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#define SN5S330_FUNC_SET12 0x5B
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#define SN5S330_INT_STATUS_REG1 0x2F
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#define SN5S330_INT_STATUS_REG2 0x30
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#define SN5S330_INT_STATUS_REG3 0x31
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#define SN5S330_INT_STATUS_REG4 0x32
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#define SN5S330_INT_TRIP_RISE_REG1 0x20
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#define SN5S330_INT_TRIP_RISE_REG2 0x21
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#define SN5S330_INT_TRIP_RISE_REG3 0x22
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#define SN5S330_INT_TRIP_FALL_REG1 0x23
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#define SN5S330_INT_TRIP_FALL_REG2 0x24
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#define SN5S330_INT_TRIP_FALL_REG3 0x25
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#define SN5S330_INT_MASK_RISE_REG1 0x26
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#define SN5S330_INT_MASK_RISE_REG2 0x27
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#define SN5S330_INT_MASK_RISE_REG3 0x28
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#define SN5S330_INT_MASK_FALL_REG1 0x29
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#define SN5S330_INT_MASK_FALL_REG2 0x2A
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#define SN5S330_INT_MASK_FALL_REG3 0x2B
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#define PPX_ILIM_DEGLITCH_0_US_20 0x1
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#define PPX_ILIM_DEGLITCH_0_US_50 0x2
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#define PPX_ILIM_DEGLITCH_0_US_100 0x3
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#define PPX_ILIM_DEGLITCH_0_US_200 0x4
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#define PPX_ILIM_DEGLITCH_0_US_1000 0x5
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#define PPX_ILIM_DEGLITCH_0_US_2000 0x6
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#define PPX_ILIM_DEGLITCH_0_US_10000 0x7
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/* Internal VBUS Switch Current Limit Settings (min) */
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#define SN5S330_ILIM_0_35 0
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#define SN5S330_ILIM_0_63 1
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#define SN5S330_ILIM_0_90 2
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#define SN5S330_ILIM_1_14 3
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#define SN5S330_ILIM_1_38 4
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#define SN5S330_ILIM_1_62 5
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#define SN5S330_ILIM_1_86 6
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#define SN5S330_ILIM_2_10 7
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#define SN5S330_ILIM_2_34 8
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#define SN5S330_ILIM_2_58 9
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#define SN5S330_ILIM_2_82 10
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#define SN5S330_ILIM_3_06 11
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#define SN5S330_ILIM_3_30 12
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/* FUNC_SET_2 */
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#define SN5S330_SBU_EN BIT(4)
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/* FUNC_SET_3 */
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#define SN5S330_PP1_EN BIT(0)
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#define SN5S330_PP2_EN BIT(1)
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#define SN5S330_VBUS_DISCH_EN BIT(2)
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#define SN5S330_SET_RCP_MODE_PP1 BIT(5)
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#define SN5S330_SET_RCP_MODE_PP2 BIT(6)
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/* FUNC_SET_4 */
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#define SN5S330_VCONN_EN BIT(0)
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#define SN5S330_CC_POLARITY BIT(1)
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#define SN5S330_CC_EN BIT(4)
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#define SN5S330_VCONN_ILIM_SEL BIT(5)
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/* FUNC_SET_8 */
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#define SN5S330_VCONN_DEGLITCH_MASK (3 << 6)
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#define SN5S330_VCONN_DEGLITCH_63_US (0 << 6)
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#define SN5S330_VCONN_DEGLITCH_125_US BIT(6)
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#define SN5S330_VCONN_DEGLITCH_640_US (2 << 6)
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#define SN5S330_VCONN_DEGLITCH_1280_US (3 << 6)
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/* FUNC_SET_9 */
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#define SN5S330_FORCE_OVP_EN_SBU BIT(1)
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#define SN5S330_PP2_CONFIG BIT(2)
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#define SN5S330_OVP_EN_CC BIT(4)
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#define SN5S330_CONFIG_UVP BIT(5)
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#define SN5S330_FORCE_ON_VBUS_OVP BIT(6)
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#define SN5S330_FORCE_ON_VBUS_UVP BIT(7)
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/* INT_STATUS_REG3 */
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#define SN5S330_VBUS_GOOD BIT(0)
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/* INT_STATUS_REG4 */
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#define SN5S330_DIG_RES BIT(0)
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#define SN5S330_DB_BOOT BIT(1)
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#define SN5S330_VSAFE0V_STAT BIT(2)
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#define SN5S330_VSAFE0V_MASK BIT(3)
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/*
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* INT_MASK_RISE/FALL_EDGE_1
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*
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* The ILIM_PP1 bit indicates an overcurrent condition when sourcing on power
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* path 1. For rising edge registers, this indicates an overcurrent has
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* occured; similarly for falling edge, it means the overcurrent condition is no
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* longer present.
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*/
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#define SN5S330_ILIM_PP1_MASK BIT(4)
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/*
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* INT_MASK_RISE/FALL_EDGE2
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*
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* The VCONN_ILIM bit indicates an overcurrent condition on VCONN. By default,
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* VCONN will be latched off.
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*/
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#define SN5S330_VCONN_ILIM (1 << 1)
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/*
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* INT_MASK_RISE/FALL_EDGE_3
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*
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* The VBUS_GOOD bit indicates VBUS has increased beyond a 4.0V threshold.
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* For rising edge registers, this indicates VBUS has risen above 4.0V.
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* For falling edge registers, this indicates VBUS has fallen below 4.0V.
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*/
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#define SN5S330_VBUS_GOOD_MASK BIT(0)
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extern const struct ppc_drv sn5s330_drv;
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/**
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* Interrupt Handler for the SN5S330.
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*
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* By default, the only interrupt sources that are unmasked are overcurrent
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* conditions for PP1, and VBUS_GOOD if PPC is being used to detect VBUS
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* (CONFIG_USB_PD_VBUS_DETECT_PPC).
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*
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* @param port: The Type-C port which triggered the interrupt.
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*/
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void sn5s330_interrupt(int port);
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#endif /* defined(__CROS_EC_SN5S330_H) */
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