142 lines
4.5 KiB
C
142 lines
4.5 KiB
C
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/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* USB Power delivery port management */
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#ifndef __CROS_EC_USB_PD_TCPM_ANX7447_H
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#define __CROS_EC_USB_PD_TCPM_ANX7447_H
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/* Registers: TCPC slave address used */
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#define ANX7447_REG_TCPC_SWITCH_0 0xB4
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#define ANX7447_REG_TCPC_SWITCH_1 0xB5
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#define ANX7447_REG_TCPC_AUX_SWITCH 0xB6
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#define ANX7447_REG_INTR_ALERT_MASK_0 0xC9
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#define ANX7447_REG_TCPC_CTRL_2 0xCD
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#define ANX7447_REG_ENABLE_VBUS_PROTECT 0x20
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#define ANX7447_REG_ADC_CTRL_1 0xBF
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#define ANX7447_REG_ADCFSM_EN 0x20
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/* Registers: SPI slave address used */
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#define ANX7447_REG_HPD_CTRL_0 0x7E
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#define ANX7447_REG_HPD_MODE 0x01
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#define ANX7447_REG_HPD_OUT 0x02
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#define ANX7447_REG_HPD_DEGLITCH_H 0x80
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#define ANX7447_REG_HPD_OEN 0x40
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#define ANX7447_REG_INTP_CTRL_0 0x9E
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#define ANX7447_REG_ANALOG_CTRL_8 0xA8
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#define ANX7447_REG_VCONN_OCP_MASK 0x0C
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#define ANX7447_REG_VCONN_OCP_240mA 0x00
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#define ANX7447_REG_VCONN_OCP_310mA 0x04
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#define ANX7447_REG_VCONN_OCP_370mA 0x08
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#define ANX7447_REG_VCONN_OCP_440mA 0x0C
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#define ANX7447_REG_ANALOG_CTRL_10 0xAA
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_MASK 0x38
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_19US 0x00
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_38US 0x08
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_76US 0x10
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_152US 0x18
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_303US 0x20
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_607US 0x28
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_1210US 0x30
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#define ANX7447_REG_R_VCONN_PWR_PRT_INRUSH_TIME_2430US 0x38
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#define ANX7447_REG_ANALOG_CTRL_9 0xA9
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#define ANX7447_REG_SAFE_MODE 0x80
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#define ANX7447_REG_R_AUX_RES_PULL_SRC 0x20
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/*
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* This section of defines are only required to support the config option
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* CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND.
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*/
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/* SPI registers used for OCM flash operations */
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#define ANX7447_DELAY_IN_US (20*1000)
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#define ANX7447_REG_R_RAM_CTRL 0x05
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#define ANX7447_REG_R_FLASH_RW_CTRL 0x30
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#define ANX7447_REG_R_FLASH_STATUS_0 0x31
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#define ANX7447_REG_FLASH_INST_TYPE 0x33
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#define ANX7447_REG_FLASH_ERASE_TYPE 0x34
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#define ANX7447_REG_OCM_CTRL_0 0x6E
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#define ANX7447_REG_ADDR_GPIO_CTRL_0 0x88
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#define ANX7447_REG_OCM_VERSION 0xB4
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/* R_RAM_CTRL bit definitions */
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#define ANX7447_R_RAM_CTRL_FLASH_DONE (1<<7)
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/* R_FLASH_RW_CTRL bit definitions */
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#define ANX7447_R_FLASH_RW_CTRL_GENERAL_INST_EN (1<<6)
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#define ANX7447_R_FLASH_RW_CTRL_FLASH_ERASE_EN (1<<5)
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#define ANX7447_R_FLASH_RW_CTRL_WRITE_STATUS_EN (1<<2)
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#define ANX7447_R_FLASH_RW_CTRL_FLASH_READ (1<<1)
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#define ANX7447_R_FLASH_RW_CTRL_FLASH_WRITE (1<<0)
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/* R_FLASH_STATUS_0 definitions */
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#define ANX7447_FLASH_STATUS_SPI_STATUS_0 0x43
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/* FLASH_ERASE_TYPE bit definitions */
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#define ANX7447_FLASH_INST_TYPE_WRITEENABLE 0x06
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#define ANX7447_FLASH_ERASE_TYPE_CHIPERASE 0x60
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/* OCM_CTRL_0 bit definitions */
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#define ANX7447_OCM_CTRL_OCM_RESET (1<<6)
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/* ADDR_GPIO_CTRL_0 bit definitions */
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#define ANX7447_ADDR_GPIO_CTRL_0_SPI_WP (1<<7)
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#define ANX7447_ADDR_GPIO_CTRL_0_SPI_CLK_ENABLE (1<<6)
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/* End of defines used for CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND */
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struct anx7447_i2c_addr {
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uint16_t tcpc_slave_addr_flags;
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uint16_t spi_slave_addr_flags;
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};
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#define AN7447_TCPC0_I2C_ADDR_FLAGS 0x2C
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#define AN7447_TCPC1_I2C_ADDR_FLAGS 0x2B
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#define AN7447_TCPC2_I2C_ADDR_FLAGS 0x2A
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#define AN7447_TCPC3_I2C_ADDR_FLAGS 0x29
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#define AN7447_SPI0_I2C_ADDR_FLAGS 0x3F
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#define AN7447_SPI1_I2C_ADDR_FLAGS 0x37
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#define AN7447_SPI2_I2C_ADDR_FLAGS 0x32
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#define AN7447_SPI3_I2C_ADDR_FLAGS 0x31
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/*
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* Time TEST_R must be held high for a reset
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*/
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#define ANX74XX_RESET_HOLD_MS 1
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/*
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* Time after TEST_R reset to wait for eFuse loading
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*/
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#define ANX74XX_RESET_FINISH_MS 2
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int anx7447_set_power_supply_ready(int port);
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int anx7447_power_supply_reset(int port);
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int anx7447_board_charging_enable(int port, int enable);
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void anx7447_hpd_mode_en(int port);
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void anx7447_hpd_output_en(int port);
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extern const struct tcpm_drv anx7447_tcpm_drv;
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extern const struct usb_mux_driver anx7447_usb_mux_driver;
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void anx7447_tcpc_update_hpd_status(int port, int hpd_lvl, int hpd_irq);
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void anx7447_tcpc_clear_hpd_status(int port);
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/**
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* Erase OCM flash if it's not empty
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*
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* @param port: USB-C port number
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* @return: EC_SUCCESS or EC_ERROR_*
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*/
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int anx7447_flash_erase(int port);
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#endif /* __CROS_EC_USB_PD_TCPM_ANX7688_H */
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