49 lines
1.7 KiB
Markdown
49 lines
1.7 KiB
Markdown
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# Lenovo Sandy Bridge series
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## Flashing coreboot
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```eval_rst
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+---------------------+--------------------+
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| Type | Value |
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+=====================+====================+
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| Socketed flash | no |
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+---------------------+--------------------+
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| Size | 8 MiB |
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+---------------------+--------------------+
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| In circuit flashing | Yes |
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+---------------------+--------------------+
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| Package | SOIC-8 |
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+---------------------+--------------------+
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| Write protection | No |
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+---------------------+--------------------+
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| Dual BIOS feature | No |
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+---------------------+--------------------+
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| Internal flashing | Yes |
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+---------------------+--------------------+
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```
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## Installation instructions
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* Update the EC firmware, as there's no support for EC updates in coreboot.
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* Do **NOT** accidently swap pins or power on the board while a SPI flasher
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is connected. It will destroy your device.
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* It's recommended to only flash the BIOS region. In that case you don't
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need to extract blobs from vendor firmware.
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If you want to flash the whole chip, you need blobs when building
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coreboot.
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* The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space
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usable by coreboot.
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* ROM chip size should be set to 8MiB.
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```eval_rst
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Please also have a look at :doc:`../../flash_tutorial/index`.
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```
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## Flash layout
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There's one 8MiB flash which contains IFD, GBE, ME and BIOS regions.
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On Lenovo's UEFI the EC firmware update is placed at the start of the BIOS
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region. The update is then written into the EC once.
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![][fl]
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[fl]: flashlayout_xx20.svg
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