623 lines
22 KiB
C
623 lines
22 KiB
C
/*
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <stdbool.h>
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#include <arch.h>
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#include <common/debug.h>
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#include <drivers/arm/ccn.h>
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#include <lib/bakery_lock.h>
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#include <lib/mmio.h>
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#include "ccn_private.h"
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static const ccn_desc_t *ccn_plat_desc;
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#if defined(IMAGE_BL31) || (!defined(__aarch64__) && defined(IMAGE_BL32))
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DEFINE_BAKERY_LOCK(ccn_lock);
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#endif
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/*******************************************************************************
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* This function takes the base address of the CCN's programmer's view (PV), a
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* region ID of one of the 256 regions (0-255) and a register offset within the
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* region. It converts the first two parameters into a base address and uses it
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* to read the register at the offset.
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******************************************************************************/
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static inline unsigned long long ccn_reg_read(uintptr_t periphbase,
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unsigned int region_id,
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unsigned int register_offset)
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{
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uintptr_t region_base;
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assert(periphbase);
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assert(region_id < REGION_ID_LIMIT);
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region_base = periphbase + region_id_to_base(region_id);
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return mmio_read_64(region_base + register_offset);
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}
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/*******************************************************************************
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* This function takes the base address of the CCN's programmer's view (PV), a
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* region ID of one of the 256 regions (0-255), a register offset within the
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* region and a value. It converts the first two parameters into a base address
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* and uses it to write the value in the register at the offset.
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******************************************************************************/
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static inline void ccn_reg_write(uintptr_t periphbase,
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unsigned int region_id,
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unsigned int register_offset,
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unsigned long long value)
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{
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uintptr_t region_base;
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assert(periphbase);
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assert(region_id < REGION_ID_LIMIT);
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region_base = periphbase + region_id_to_base(region_id);
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mmio_write_64(region_base + register_offset, value);
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}
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#if ENABLE_ASSERTIONS
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typedef struct rn_info {
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unsigned char node_desc[MAX_RN_NODES];
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} rn_info_t;
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/*******************************************************************************
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* This function takes the base address of the CCN's programmer's view (PV) and
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* the node ID of a Request Node (RN-D or RN-I). It returns the maximum number
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* of master interfaces resident on that node. This number is equal to the least
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* significant two bits of the node type ID + 1.
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******************************************************************************/
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static unsigned int ccn_get_rni_mcount(uintptr_t periphbase,
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unsigned int rn_id)
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{
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unsigned int rn_type_id;
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/* Use the node id to find the type of RN-I/D node */
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rn_type_id = get_node_type(ccn_reg_read(periphbase,
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rn_id + RNI_REGION_ID_START,
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REGION_ID_OFFSET));
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/* Return the number master interfaces based on node type */
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return rn_type_id_to_master_cnt(rn_type_id);
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}
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/*******************************************************************************
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* This function reads the CCN registers to find the following information about
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* the ACE/ACELite/ACELite+DVM/CHI interfaces resident on the various types of
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* Request Nodes (RN-Fs, RN-Is and RN-Ds) in the system:
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*
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* 1. The total number of such interfaces that this CCN IP supports. This is the
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* cumulative number of interfaces across all Request node types. It is
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* passed back as the return value of this function.
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*
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* 2. The maximum number of interfaces of a type resident on a Request node of
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* one of the three types. This information is populated in the 'info'
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* array provided by the caller as described next.
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*
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* The array has 64 entries. Each entry corresponds to a Request node. The
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* Miscellaneous node's programmer's view has RN-F, RN-I and RN-D ID
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* registers. For each RN-I and RN-D ID indicated as being present in these
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* registers, its identification register (offset 0xFF00) is read. This
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* register specifies the maximum number of master interfaces the node
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* supports. For RN-Fs it is assumed that there can be only a single fully
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* coherent master resident on each node. The counts for each type of node
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* are use to populate the array entry at the index corresponding to the node
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* ID i.e. rn_info[node ID] = <number of master interfaces>
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******************************************************************************/
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static unsigned int ccn_get_rn_master_info(uintptr_t periphbase,
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rn_info_t *info)
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{
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unsigned int num_masters = 0;
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rn_types_t rn_type;
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assert (info);
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for (rn_type = RN_TYPE_RNF; rn_type < NUM_RN_TYPES; rn_type++) {
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unsigned int mn_reg_off, node_id;
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unsigned long long rn_bitmap;
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/*
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* RN-F, RN-I, RN-D node registers in the MN region occupy
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* contiguous 16 byte apart offsets.
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*/
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mn_reg_off = MN_RNF_NODEID_OFFSET + (rn_type << 4);
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rn_bitmap = ccn_reg_read(periphbase, MN_REGION_ID, mn_reg_off);
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FOR_EACH_PRESENT_NODE_ID(node_id, rn_bitmap) {
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unsigned int node_mcount;
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/*
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* A RN-F does not have a node type since it does not
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* export a programmer's interface. It can only have a
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* single fully coherent master residing on it. If the
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* offset of the MN(Miscellaneous Node) register points
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* to a RN-I/D node then the master count is set to the
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* maximum number of master interfaces that can possibly
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* reside on the node.
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*/
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node_mcount = (mn_reg_off == MN_RNF_NODEID_OFFSET ? 1 :
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ccn_get_rni_mcount(periphbase, node_id));
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/*
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* Use this value to increment the maximum possible
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* master interfaces in the system.
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*/
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num_masters += node_mcount;
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/*
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* Update the entry in 'info' for this node ID with
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* the maximum number of masters than can sit on
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* it. This information will be used to validate the
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* node information passed by the platform later.
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*/
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info->node_desc[node_id] = node_mcount;
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}
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}
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return num_masters;
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}
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/*******************************************************************************
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* This function validates parameters passed by the platform (in a debug build).
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* It collects information about the maximum number of master interfaces that:
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* a) the CCN IP can accommodate and
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* b) can exist on each Request node.
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* It compares this with the information provided by the platform to determine
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* the validity of the latter.
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******************************************************************************/
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static void __init ccn_validate_plat_params(const ccn_desc_t *plat_desc)
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{
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unsigned int master_id, num_rn_masters;
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rn_info_t info = { {0} };
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assert(plat_desc);
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assert(plat_desc->periphbase);
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assert(plat_desc->master_to_rn_id_map);
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assert(plat_desc->num_masters);
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assert(plat_desc->num_masters < CCN_MAX_RN_MASTERS);
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/*
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* Find the number and properties of fully coherent, IO coherent and IO
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* coherent + DVM master interfaces
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*/
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num_rn_masters = ccn_get_rn_master_info(plat_desc->periphbase, &info);
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assert(plat_desc->num_masters < num_rn_masters);
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/*
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* Iterate through the Request nodes specified by the platform.
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* Decrement the count of the masters in the 'info' array for each
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* Request node encountered. If the count would drop below 0 then the
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* platform's view of this aspect of CCN configuration is incorrect.
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*/
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for (master_id = 0; master_id < plat_desc->num_masters; master_id++) {
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unsigned int node_id;
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node_id = plat_desc->master_to_rn_id_map[master_id];
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assert(node_id < MAX_RN_NODES);
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assert(info.node_desc[node_id]);
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info.node_desc[node_id]--;
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}
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}
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#endif /* ENABLE_ASSERTIONS */
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/*******************************************************************************
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* This function validates parameters passed by the platform (in a debug build)
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* and initialises its internal data structures. A lock is required to prevent
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* simultaneous CCN operations at runtime (only BL31) to add and remove Request
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* nodes from coherency.
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******************************************************************************/
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void __init ccn_init(const ccn_desc_t *plat_desc)
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{
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#if ENABLE_ASSERTIONS
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ccn_validate_plat_params(plat_desc);
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#endif
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ccn_plat_desc = plat_desc;
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}
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/*******************************************************************************
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* This function converts a bit map of master interface IDs to a bit map of the
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* Request node IDs that they reside on.
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******************************************************************************/
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static unsigned long long ccn_master_to_rn_id_map(unsigned long long master_map)
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{
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unsigned long long rn_id_map = 0;
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unsigned int node_id, iface_id;
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assert(master_map);
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assert(ccn_plat_desc);
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FOR_EACH_PRESENT_MASTER_INTERFACE(iface_id, master_map) {
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assert(iface_id < ccn_plat_desc->num_masters);
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/* Convert the master ID into the node ID */
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node_id = ccn_plat_desc->master_to_rn_id_map[iface_id];
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/* Set the bit corresponding to this node ID */
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rn_id_map |= (1ULL << node_id);
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}
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return rn_id_map;
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}
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/*******************************************************************************
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* This function executes the necessary operations to add or remove Request node
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* IDs specified in the 'rn_id_map' bitmap from the snoop/DVM domains specified
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* in the 'hn_id_map'. The 'region_id' specifies the ID of the first HN-F/MN
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* on which the operation should be performed. 'op_reg_offset' specifies the
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* type of operation (add/remove). 'stat_reg_offset' specifies the register
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* which should be polled to determine if the operation has completed or not.
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******************************************************************************/
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static void ccn_snoop_dvm_do_op(unsigned long long rn_id_map,
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unsigned long long hn_id_map,
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unsigned int region_id,
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unsigned int op_reg_offset,
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unsigned int stat_reg_offset)
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{
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unsigned int start_region_id;
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assert(ccn_plat_desc);
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assert(ccn_plat_desc->periphbase);
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#if defined(IMAGE_BL31) || (!defined(__aarch64__) && defined(IMAGE_BL32))
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bakery_lock_get(&ccn_lock);
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#endif
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start_region_id = region_id;
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FOR_EACH_PRESENT_REGION_ID(start_region_id, hn_id_map) {
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ccn_reg_write(ccn_plat_desc->periphbase,
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start_region_id,
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op_reg_offset,
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rn_id_map);
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}
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start_region_id = region_id;
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FOR_EACH_PRESENT_REGION_ID(start_region_id, hn_id_map) {
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WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(start_region_id,
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stat_reg_offset,
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op_reg_offset,
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rn_id_map);
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}
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#if defined(IMAGE_BL31) || (!defined(__aarch64__) && defined(IMAGE_BL32))
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bakery_lock_release(&ccn_lock);
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#endif
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}
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/*******************************************************************************
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* The following functions provide the boot and runtime API to the platform for
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* adding and removing master interfaces from the snoop/DVM domains. A bitmap of
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* master interfaces IDs is passed as a parameter. It is converted into a bitmap
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* of Request node IDs using the mapping provided by the platform while
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* initialising the driver.
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* For example, consider a dual cluster system where the clusters have values 0
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* & 1 in the affinity level 1 field of their respective MPIDRs. While
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* initialising this driver, the platform provides the mapping between each
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* cluster and the corresponding Request node. To add or remove a cluster from
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* the snoop and dvm domain, the bit position corresponding to the cluster ID
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* should be set in the 'master_iface_map' i.e. to remove both clusters the
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* bitmap would equal 0x11.
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******************************************************************************/
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void ccn_enter_snoop_dvm_domain(unsigned long long master_iface_map)
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{
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unsigned long long rn_id_map;
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rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_HN_NODEID_MAP(ccn_plat_desc->periphbase,
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MN_HNF_NODEID_OFFSET),
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HNF_REGION_ID_START,
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HNF_SDC_SET_OFFSET,
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HNF_SDC_STAT_OFFSET);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
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MN_REGION_ID,
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MN_DDC_SET_OFFSET,
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MN_DDC_STAT_OFFSET);
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}
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void ccn_exit_snoop_dvm_domain(unsigned long long master_iface_map)
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{
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unsigned long long rn_id_map;
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rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_HN_NODEID_MAP(ccn_plat_desc->periphbase,
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MN_HNF_NODEID_OFFSET),
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HNF_REGION_ID_START,
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HNF_SDC_CLR_OFFSET,
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HNF_SDC_STAT_OFFSET);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
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MN_REGION_ID,
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MN_DDC_CLR_OFFSET,
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MN_DDC_STAT_OFFSET);
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}
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void ccn_enter_dvm_domain(unsigned long long master_iface_map)
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{
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unsigned long long rn_id_map;
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rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
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MN_REGION_ID,
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MN_DDC_SET_OFFSET,
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MN_DDC_STAT_OFFSET);
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}
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void ccn_exit_dvm_domain(unsigned long long master_iface_map)
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{
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unsigned long long rn_id_map;
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rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
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ccn_snoop_dvm_do_op(rn_id_map,
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CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
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MN_REGION_ID,
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MN_DDC_CLR_OFFSET,
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MN_DDC_STAT_OFFSET);
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}
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/*******************************************************************************
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* This function returns the run mode of all the L3 cache partitions in the
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* system. The state is expected to be one of NO_L3, SF_ONLY, L3_HAM or
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* L3_FAM. Instead of comparing the states reported by all HN-Fs, the state of
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* the first present HN-F node is reported. Since the driver does not export an
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* interface to program them separately, there is no reason to perform this
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* check. An HN-F could report that the L3 cache is transitioning from one mode
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* to another e.g. HNF_PM_NOL3_2_SFONLY. In this case, the function waits for
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* the transition to complete and reports the final state.
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******************************************************************************/
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unsigned int ccn_get_l3_run_mode(void)
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{
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unsigned long long hnf_pstate_stat;
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assert(ccn_plat_desc);
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assert(ccn_plat_desc->periphbase);
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/*
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* Wait for a L3 cache partition to enter any run mode. The pstate
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* parameter is read from an HN-F P-state status register. A non-zero
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* value in bits[1:0] means that the cache is transitioning to a run
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* mode.
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*/
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do {
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hnf_pstate_stat = ccn_reg_read(ccn_plat_desc->periphbase,
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HNF_REGION_ID_START,
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HNF_PSTATE_STAT_OFFSET);
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} while (hnf_pstate_stat & 0x3);
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return PSTATE_TO_RUN_MODE(hnf_pstate_stat);
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}
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/*******************************************************************************
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* This function sets the run mode of all the L3 cache partitions in the
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* system to one of NO_L3, SF_ONLY, L3_HAM or L3_FAM depending upon the state
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* specified by the 'mode' argument.
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******************************************************************************/
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void ccn_set_l3_run_mode(unsigned int mode)
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{
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unsigned long long mn_hnf_id_map, hnf_pstate_stat;
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unsigned int region_id;
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assert(ccn_plat_desc);
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assert(ccn_plat_desc->periphbase);
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assert(mode <= CCN_L3_RUN_MODE_FAM);
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mn_hnf_id_map = ccn_reg_read(ccn_plat_desc->periphbase,
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MN_REGION_ID,
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MN_HNF_NODEID_OFFSET);
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region_id = HNF_REGION_ID_START;
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/* Program the desired run mode */
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FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
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ccn_reg_write(ccn_plat_desc->periphbase,
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region_id,
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HNF_PSTATE_REQ_OFFSET,
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mode);
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}
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/* Wait for the caches to transition to the run mode */
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region_id = HNF_REGION_ID_START;
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FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
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/*
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* Wait for a L3 cache partition to enter a target run
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* mode. The pstate parameter is read from an HN-F P-state
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* status register.
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*/
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do {
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hnf_pstate_stat = ccn_reg_read(ccn_plat_desc->periphbase,
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region_id,
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HNF_PSTATE_STAT_OFFSET);
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} while (((hnf_pstate_stat & HNF_PSTATE_MASK) >> 2) != mode);
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}
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}
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/*******************************************************************************
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* This function configures system address map and provides option to enable the
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* 3SN striping mode of Slave node operation. The Slave node IDs and the Top
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* Address bit1 and bit0 are provided as parameters to this function. This
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* configuration is needed only if network contains a single SN-F or 3 SN-F and
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* must be completed before the first request by the system to normal memory.
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******************************************************************************/
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void ccn_program_sys_addrmap(unsigned int sn0_id,
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unsigned int sn1_id,
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unsigned int sn2_id,
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unsigned int top_addr_bit0,
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unsigned int top_addr_bit1,
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unsigned char three_sn_en)
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{
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unsigned long long mn_hnf_id_map, hnf_sam_ctrl_value;
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unsigned int region_id;
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assert(ccn_plat_desc);
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assert(ccn_plat_desc->periphbase);
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|
|
mn_hnf_id_map = ccn_reg_read(ccn_plat_desc->periphbase,
|
|
MN_REGION_ID,
|
|
MN_HNF_NODEID_OFFSET);
|
|
region_id = HNF_REGION_ID_START;
|
|
hnf_sam_ctrl_value = MAKE_HNF_SAM_CTRL_VALUE(sn0_id,
|
|
sn1_id,
|
|
sn2_id,
|
|
top_addr_bit0,
|
|
top_addr_bit1,
|
|
three_sn_en);
|
|
|
|
FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
|
|
|
|
/* Program the SAM control register */
|
|
ccn_reg_write(ccn_plat_desc->periphbase,
|
|
region_id,
|
|
HNF_SAM_CTRL_OFFSET,
|
|
hnf_sam_ctrl_value);
|
|
}
|
|
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* This function returns the part0 id from the peripheralID 0 register
|
|
* in CCN. This id can be used to distinguish the CCN variant present in the
|
|
* system.
|
|
******************************************************************************/
|
|
int ccn_get_part0_id(uintptr_t periphbase)
|
|
{
|
|
assert(periphbase);
|
|
return (int)(mmio_read_64(periphbase
|
|
+ MN_PERIPH_ID_0_1_OFFSET) & 0xFF);
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* This function returns the region id corresponding to a node_id of node_type.
|
|
******************************************************************************/
|
|
static unsigned int get_region_id_for_node(node_types_t node_type,
|
|
unsigned int node_id)
|
|
{
|
|
unsigned int mn_reg_off, region_id;
|
|
unsigned long long node_bitmap;
|
|
unsigned int loc_node_id, node_pos_in_map = 0;
|
|
|
|
assert(node_type < NUM_NODE_TYPES);
|
|
assert(node_id < MAX_RN_NODES);
|
|
|
|
switch (node_type) {
|
|
case NODE_TYPE_RNI:
|
|
region_id = RNI_REGION_ID_START;
|
|
break;
|
|
case NODE_TYPE_HNF:
|
|
region_id = HNF_REGION_ID_START;
|
|
break;
|
|
case NODE_TYPE_HNI:
|
|
region_id = HNI_REGION_ID_START;
|
|
break;
|
|
case NODE_TYPE_SN:
|
|
region_id = SBSX_REGION_ID_START;
|
|
break;
|
|
default:
|
|
ERROR("Un-supported Node Type = %d.\n", node_type);
|
|
assert(false);
|
|
return REGION_ID_LIMIT;
|
|
}
|
|
/*
|
|
* RN-I, HN-F, HN-I, SN node registers in the MN region
|
|
* occupy contiguous 16 byte apart offsets.
|
|
*
|
|
* RN-F and RN-D node are not supported as
|
|
* none of them exposes any memory map to
|
|
* configure any of their offset registers.
|
|
*/
|
|
|
|
mn_reg_off = MN_RNF_NODEID_OFFSET + (node_type << 4);
|
|
node_bitmap = ccn_reg_read(ccn_plat_desc->periphbase,
|
|
MN_REGION_ID, mn_reg_off);
|
|
|
|
assert((node_bitmap & (1ULL << (node_id))) != 0U);
|
|
|
|
|
|
FOR_EACH_PRESENT_NODE_ID(loc_node_id, node_bitmap) {
|
|
INFO("Index = %u with loc_nod=%u and input nod=%u\n",
|
|
node_pos_in_map, loc_node_id, node_id);
|
|
if (loc_node_id == node_id)
|
|
break;
|
|
node_pos_in_map++;
|
|
}
|
|
|
|
if (node_pos_in_map == CCN_MAX_RN_MASTERS) {
|
|
ERROR("Node Id = %d, is not found.\n", node_id);
|
|
assert(false);
|
|
return REGION_ID_LIMIT;
|
|
}
|
|
|
|
/*
|
|
* According to section 3.1.1 in CCN specification, region offset for
|
|
* the RN-I components is calculated as (128 + NodeID of RN-I).
|
|
*/
|
|
if (node_type == NODE_TYPE_RNI)
|
|
region_id += node_id;
|
|
else
|
|
region_id += node_pos_in_map;
|
|
|
|
return region_id;
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* This function sets the value 'val' to the register at register_offset from
|
|
* the base address pointed to by the region_id.
|
|
* where, region id is mapped to a node_id of node_type.
|
|
******************************************************************************/
|
|
void ccn_write_node_reg(node_types_t node_type, unsigned int node_id,
|
|
unsigned int reg_offset, unsigned long long val)
|
|
{
|
|
unsigned int region_id = get_region_id_for_node(node_type, node_id);
|
|
|
|
if (reg_offset > REGION_ID_OFFSET) {
|
|
ERROR("Invalid Register offset 0x%x is provided.\n",
|
|
reg_offset);
|
|
assert(false);
|
|
return;
|
|
}
|
|
|
|
/* Setting the value of Auxiliary Control Register of the Node */
|
|
ccn_reg_write(ccn_plat_desc->periphbase, region_id, reg_offset, val);
|
|
VERBOSE("Value is successfully written at address 0x%lx.\n",
|
|
(ccn_plat_desc->periphbase
|
|
+ region_id_to_base(region_id))
|
|
+ reg_offset);
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* This function read the value 'val' stored in the register at register_offset
|
|
* from the base address pointed to by the region_id.
|
|
* where, region id is mapped to a node_id of node_type.
|
|
******************************************************************************/
|
|
unsigned long long ccn_read_node_reg(node_types_t node_type,
|
|
unsigned int node_id,
|
|
unsigned int reg_offset)
|
|
{
|
|
unsigned long long val;
|
|
unsigned int region_id = get_region_id_for_node(node_type, node_id);
|
|
|
|
if (reg_offset > REGION_ID_OFFSET) {
|
|
ERROR("Invalid Register offset 0x%x is provided.\n",
|
|
reg_offset);
|
|
assert(false);
|
|
return ULL(0);
|
|
}
|
|
|
|
/* Setting the value of Auxiliary Control Register of the Node */
|
|
val = ccn_reg_read(ccn_plat_desc->periphbase, region_id, reg_offset);
|
|
VERBOSE("Value is successfully read from address 0x%lx.\n",
|
|
(ccn_plat_desc->periphbase
|
|
+ region_id_to_base(region_id))
|
|
+ reg_offset);
|
|
|
|
return val;
|
|
}
|