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Trusted Firmware-A - version 2.1
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================================
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.. section-numbering::
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:suffix: .
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.. contents::
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Trusted Firmware-A (TF-A) provides a reference implementation of secure world
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software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing
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at Exception Level 3 (EL3). It implements various Arm interface standards,
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such as:
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- The `Power State Coordination Interface (PSCI)`_
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- `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_
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- `SMC Calling Convention`_
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- `System Control and Management Interface (SCMI)`_
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- `Software Delegated Exception Interface (SDEI)`_
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Where possible, the code is designed for reuse or porting to other Armv7-A and
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Armv8-A model and hardware platforms.
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This release provides a suitable starting point for productization of secure
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world boot and runtime firmware, in either the AArch32 or AArch64 execution
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states.
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Users are encouraged to do their own security validation, including penetration
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testing, on any secure world code derived from TF-A.
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Arm will continue development in collaboration with interested parties to
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provide a full reference implementation of Secure Monitor code and Arm standards
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to the benefit of all developers working with Armv7-A and Armv8-A TrustZone
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technology.
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Documentation contents
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----------------------
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The `Trusted Firmware-A Documentation Contents`_ page contains an overview of
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the documentation that is available, with links to facilitate easier browsing.
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License
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-------
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The software is provided under a BSD-3-Clause `license`_. Contributions to this
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project are accepted under the same license with developer sign-off as
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described in the `Contributing Guidelines`_.
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This project contains code from other projects as listed below. The original
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license text is included in those source files.
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- The libc source code is derived from `FreeBSD`_ and `SCC`_. FreeBSD uses
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various BSD licenses, including BSD-3-Clause and BSD-2-Clause. The SCC code
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is used under the BSD-3-Clause license with the author's permission.
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- The libfdt source code is disjunctively dual licensed
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(GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of
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the BSD-2-Clause license. Any contributions to this code must be made under
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the terms of both licenses.
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- The LLVM compiler-rt source code is disjunctively dual licensed
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(NCSA OR MIT). It is used by this project under the terms of the NCSA
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license (also known as the University of Illinois/NCSA Open Source License),
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which is a permissive license compatible with BSD-3-Clause. Any
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contributions to this code must be made under the terms of both licenses.
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- The zlib source code is licensed under the Zlib license, which is a
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permissive license compatible with BSD-3-Clause.
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- Some STMicroelectronics platform source code is disjunctively dual licensed
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(GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the
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BSD-3-Clause license. Any contributions to this code must be made under the
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terms of both licenses.
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Functionality
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-------------
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- Initialization of the secure world, for example exception vectors, control
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registers and interrupts for the platform.
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- Library support for CPU specific reset and power down sequences. This
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includes support for errata workarounds and the latest Arm DynamIQ CPUs.
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- Drivers to enable standard initialization of Arm System IP, for example
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Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI),
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Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone
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Controller (TZC).
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- A generic `SCMI`_ driver to interface with conforming power controllers, for
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example the Arm System Control Processor (SCP).
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- SMC (Secure Monitor Call) handling, conforming to the `SMC Calling
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Convention`_ using an EL3 runtime services framework.
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- `PSCI`_ library support for CPU, cluster and system power management
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use-cases.
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This library is pre-integrated with the AArch64 EL3 Runtime Software, and
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is also suitable for integration with other AArch32 EL3 Runtime Software,
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for example an AArch32 Secure OS.
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- A minimal AArch32 Secure Payload (SP\_MIN) to demonstrate `PSCI`_ library
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integration with AArch32 EL3 Runtime Software.
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- Secure Monitor library code such as world switching, EL1 context management
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and interrupt routing.
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When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the
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AArch64 EL3 Runtime Software must be integrated with a Secure Payload
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Dispatcher (SPD) component to customize the interaction with the SP.
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- A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP
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interaction with PSCI.
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- SPDs for the `OP-TEE Secure OS`_, `NVIDIA Trusted Little Kernel`_
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and `Trusty Secure OS`_.
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- A Trusted Board Boot implementation, conforming to all mandatory TBBR
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requirements. This includes image authentication, Firmware Update (or
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recovery mode), and packaging of the various firmware images into a
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Firmware Image Package (FIP).
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- Pre-integration of TBB with the Arm CryptoCell product, to take advantage of
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its hardware Root of Trust and crypto acceleration services.
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- Reliability, Availability, and Serviceability (RAS) functionality, including
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- A Secure Partition Manager (SPM) to manage Secure Partitions in
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Secure-EL0, which can be used to implement simple management and
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security services.
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- An SDEI dispatcher to route interrupt-based SDEI events.
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- An Exception Handling Framework (EHF) that allows dispatching of EL3
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interrupts to their registered handlers, to facilitate firmware-first
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error handling.
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- A dynamic configuration framework that enables each of the firmware images
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to be configured at runtime if required by the platform. It also enables
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loading of a hardware configuration (for example, a kernel device tree)
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as part of the FIP, to be passed through the firmware stages.
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- Support for alternative boot flows, for example to support platforms where
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the EL3 Runtime Software is loaded using other firmware or a separate
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secure system processor, or where a non-TF-A ROM expects BL2 to be loaded
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at EL3.
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- Support for the GCC, LLVM and Arm Compiler 6 toolchains.
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- Support for combining several libraries into a "romlib" image that may be
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shared across images to reduce memory footprint. The romlib image is stored
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in ROM but is accessed through a jump-table that may be stored
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in read-write memory, allowing for the library code to be patched.
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- A prototype implementation of a Secure Partition Manager (SPM) that is based
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on the SPCI Alpha 1 and SPRT draft specifications.
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- Support for ARMv8.3 pointer authentication in the normal and secure worlds.
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The use of pointer authentication in the normal world is enabled whenever
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architectural support is available, without the need for additional build
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flags. Use of pointer authentication in the secure world remains an
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experimental configuration at this time and requires the
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``BRANCH_PROTECTION`` option to be set to non-zero.
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- Position-Independent Executable (PIE) support. Initially for BL31 only, with
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further support to be added in a future release.
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For a full description of functionality and implementation details, please
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see the `Firmware Design`_ and supporting documentation. The `Change Log`_
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provides details of changes made since the last release.
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Platforms
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---------
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Various AArch32 and AArch64 builds of this release have been tested on r0, r1
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and r2 variants of the `Juno Arm Development Platform`_.
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The latest version of the AArch64 build of TF-A has been tested on the following
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Arm FVPs without shifted affinities, and that do not support threaded CPU cores
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(64-bit host machine only).
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The FVP models used are Version 11.6 Build 45, unless otherwise stated.
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- ``FVP_Base_AEMv8A-AEMv8A``
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- ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502``
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- ``FVP_Base_RevC-2xAEMv8A``
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- ``FVP_Base_Cortex-A32x4``
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- ``FVP_Base_Cortex-A35x4``
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- ``FVP_Base_Cortex-A53x4``
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- ``FVP_Base_Cortex-A55x4+Cortex-A75x4``
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- ``FVP_Base_Cortex-A55x4``
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- ``FVP_Base_Cortex-A57x1-A53x1``
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- ``FVP_Base_Cortex-A57x2-A53x4``
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- ``FVP_Base_Cortex-A57x4-A53x4``
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- ``FVP_Base_Cortex-A57x4``
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- ``FVP_Base_Cortex-A72x4-A53x4``
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- ``FVP_Base_Cortex-A72x4``
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- ``FVP_Base_Cortex-A73x4-A53x4``
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- ``FVP_Base_Cortex-A73x4``
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- ``FVP_Base_Cortex-A75x4``
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- ``FVP_Base_Cortex-A76x4``
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- ``FVP_Base_Cortex-A76AEx4``
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- ``FVP_Base_Cortex-A76AEx8``
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- ``FVP_Base_Cortex-A77x4`` (Version 11.7 build 36)
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- ``FVP_Base_Neoverse-N1x4``
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- ``FVP_CSS_SGI-575`` (Version 11.3 build 42)
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- ``FVP_CSS_SGM-775`` (Version 11.3 build 42)
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- ``FVP_RD_E1Edge`` (Version 11.3 build 42)
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- ``FVP_RD_N1Edge``
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- ``Foundation_Platform``
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The latest version of the AArch32 build of TF-A has been tested on the following
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Arm FVPs without shifted affinities, and that do not support threaded CPU cores
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(64-bit host machine only).
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- ``FVP_Base_AEMv8A-AEMv8A``
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- ``FVP_Base_Cortex-A32x4``
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NOTE: The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities.
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The Foundation FVP can be downloaded free of charge. The Base FVPs can be
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licensed from Arm. See the `Arm FVP website`_.
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All the above platforms have been tested with `Linaro Release 18.04`_.
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This release also contains the following platform support:
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- Allwinner sun50i (A64, H5, and H6) SoCs
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- Amlogic Meson S905 (GXBB)
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- Amlogic Meson S905x (GXL)
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- Arm Juno Software Development Platform
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- Arm Neoverse N1 System Development Platform (N1SDP)
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- Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP
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- Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP
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- Arm SGI-575 and SGM-775
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- Arm Versatile Express FVP
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- HiKey, HiKey960 and Poplar boards
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- Intel Stratix 10 SoC FPGA
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- Marvell Armada 3700 and 8K
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- MediaTek MT6795 and MT8173 SoCs
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- NVIDIA T132, T186 and T210 SoCs
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- NXP QorIQ LS1043A, i.MX8MM, i.MX8MQ, i.MX8QX, i.MX8QM and i.MX7Solo WaRP7
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- QEMU
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- Raspberry Pi 3
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- Renesas R-Car Generation 3
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- RockChip RK3328, RK3368 and RK3399 SoCs
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- Socionext UniPhier SoC family and SynQuacer SC2A11 SoCs
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- STMicroelectronics STM32MP1
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- Texas Instruments K3 SoCs
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- Xilinx Versal and Zynq UltraScale + MPSoC
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Still to come
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-------------
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- Support for additional platforms.
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- Refinements to Position Independent Executable (PIE) support.
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- Refinements to the SPCI-based SPM implementation as the draft SPCI and SPRT
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specifications continue to evolve.
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- Documentation enhancements.
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- Ongoing support for new architectural features, CPUs and System IP.
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- Ongoing support for new Arm system architecture specifications.
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- Ongoing security hardening, optimization and quality improvements.
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For a full list of detailed issues in the current code, please see the `Change
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Log`_ and the `issue tracker`_.
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Getting started
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---------------
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See the `User Guide`_ for instructions on how to download, install, build and
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use TF-A with the Arm `FVP`_\ s.
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See the `Firmware Design`_ for information on how TF-A works.
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See the `Porting Guide`_ as well for information about how to use this
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software on another Armv7-A or Armv8-A platform.
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See the `Contributing Guidelines`_ for information on how to contribute to this
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project and the `Acknowledgments`_ file for a list of contributors to the
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project.
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Contact us
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~~~~~~~~~~
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We welcome any feedback on TF-A. If you think you have found a security
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vulnerability, please report this using the process defined in the TF-A
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`Security Center`_. For all other feedback, you can use either the
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`issue tracker`_ or our `mailing list`_.
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Arm licensees may contact Arm directly via their partner managers.
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Security advisories
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-------------------
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- `Security Advisory TFV-1`_
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- `Security Advisory TFV-2`_
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- `Security Advisory TFV-3`_
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- `Security Advisory TFV-4`_
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- `Security Advisory TFV-5`_
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- `Security Advisory TFV-6`_
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- `Security Advisory TFV-7`_
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- `Security Advisory TFV-8`_
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--------------
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*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*
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.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
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.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
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.. _Power State Coordination Interface (PSCI): PSCI_
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
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.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
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.. _System Control and Management Interface (SCMI): SCMI_
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.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
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.. _Software Delegated Exception Interface (SDEI): SDEI_
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.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
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.. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php
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.. _Arm FVP website: FVP_
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.. _FVP: https://developer.arm.com/products/system-design/fixed-virtual-platforms
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.. _Linaro Release 18.04: https://community.arm.com/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease18.04
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.. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os
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.. _NVIDIA Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary
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.. _Trusty Secure OS: https://source.android.com/security/trusty
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.. _trustedfirmware.org: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
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.. _issue tracker: https://developer.trustedfirmware.org/project/board/1/
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.. _mailing list: https://lists.trustedfirmware.org/mailman/listinfo/tf-a
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.. _Security Center: ./docs/process/security.rst
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.. _license: ./license.rst
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.. _Contributing Guidelines: ./docs/process/contributing.rst
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.. _Acknowledgments: ./docs/acknowledgements.rst
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.. _Firmware Design: ./docs/design/firmware-design.rst
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.. _Change Log: ./docs/change-log.rst
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.. _User Guide: ./docs/getting_started/user-guide.rst
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.. _Porting Guide: ./docs/getting_started/porting-guide.rst
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.. _FreeBSD: http://www.freebsd.org
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.. _SCC: http://www.simple-cc.org/
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.. _Security Advisory TFV-1: ./docs/security_advisories/security-advisory-tfv-1.rst
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.. _Security Advisory TFV-2: ./docs/security_advisories/security-advisory-tfv-2.rst
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.. _Security Advisory TFV-3: ./docs/security_advisories/security-advisory-tfv-3.rst
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.. _Security Advisory TFV-4: ./docs/security_advisories/security-advisory-tfv-4.rst
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.. _Security Advisory TFV-5: ./docs/security_advisories/security-advisory-tfv-5.rst
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.. _Security Advisory TFV-6: ./docs/security_advisories/security-advisory-tfv-6.rst
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.. _Security Advisory TFV-7: ./docs/security_advisories/security-advisory-tfv-7.rst
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.. _Security Advisory TFV-8: ./docs/security_advisories/security-advisory-tfv-8.rst
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.. _Trusted Firmware-A Documentation Contents: ./docs/contents.rst
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