37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/* -*- mode:c -*-
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*
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* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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GPIO_INT(EINT5_TP, PIN(5), GPIO_INT_FALLING, eint_event)
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GPIO_INT(EINT6_TP, PIN(6), GPIO_INT_FALLING, eint_event)
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GPIO_INT(EINT7_TP, PIN(7), GPIO_INT_FALLING, eint_event)
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/* Unimplemented signals which we need to emulate for now */
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UNIMPLEMENTED(ENTERING_RW)
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UNIMPLEMENTED(WP_L)
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/*
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* GPIOn = port * 32 + bit
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*
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* EINT ALT function:
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* GPIO[0-3]: Alt3
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* GPIO[4-7]: Alt6
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* UART0 ALT function:
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* GPIO[110]: Alt3 TP_URXD1_AO
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* GPIO[112]: Alt3 TP_UTXD1_AO
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*/
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ALTERNATE(PIN_MASK(0, 0x00000070), 6, MODULE_GPIO, 0) /* GPIO 5,6,7 as SCP EINT */
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#if CONFIG_UART_CONSOLE == 0
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#ifdef UART0_PINMUX_110_112
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/* Use SCP debug UART. */
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ALTERNATE(PIN_MASK(3, 0x00014000), 3, MODULE_UART, 0) /* GPIO 110,112 as UART0 */
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#endif /* UART0_PINMUX_110_112 */
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#ifdef UART0_PINMUX_11_12
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/* Use H1(AP->H1) rework UART. */
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ALTERNATE(PIN_MASK(0, 0x00001800), 1, MODULE_UART, 0) /* GPIO 11,12 as UART0 */
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#endif /* UART0_PINMUX_11_12 */
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#endif /* CONFIG_UART_CONSOLE == 0 */
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