403 lines
11 KiB
C
403 lines
11 KiB
C
/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "atomic.h"
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#include "clock.h"
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#include "common.h"
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#include "console.h"
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#include "dma.h"
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#include "gpio.h"
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#include "hwtimer.h"
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#include "hooks.h"
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#include "injector.h"
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#include "link_defs.h"
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#include "registers.h"
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#include "task.h"
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#include "timer.h"
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#include "usb_descriptor.h"
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#include "usb_hw.h"
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#include "util.h"
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#include "ina2xx.h"
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/* Size of one USB packet buffer */
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#define EP_BUF_SIZE 64
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#define EP_PACKET_HEADER_SIZE 4
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/* Size of the payload (packet minus the header) */
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#define EP_PAYLOAD_SIZE (EP_BUF_SIZE - EP_PACKET_HEADER_SIZE)
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/* Buffer enough to avoid overflowing due to USB latencies on both sides */
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#define RX_COUNT (16 * EP_PAYLOAD_SIZE)
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/* Task event for the USB transfer interrupt */
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#define USB_EVENT TASK_EVENT_CUSTOM_BIT(0)
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/* Bitmap of enabled capture channels : CC1+CC2 by default */
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static uint8_t channel_mask = 0x3;
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/* edge timing samples */
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static uint8_t samples[2][RX_COUNT];
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/* bitmap of the samples sub-buffer filled with DMA data */
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static volatile uint32_t filled_dma;
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/* timestamps of the beginning of DMA buffers */
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static uint16_t sample_tstamp[4];
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/* sequence number of the beginning of DMA buffers */
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static uint16_t sample_seq[4];
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/* Bulk endpoint double buffer */
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static usb_uint ep_buf[2][EP_BUF_SIZE / 2] __usb_ram;
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/* USB Buffers not used, ready to be filled */
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static volatile uint32_t free_usb = 3;
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static inline void led_set_activity(int ch)
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{
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static int accumul[2];
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static uint32_t last_ts[2];
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uint32_t now = __hw_clock_source_read();
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int delta = now - last_ts[ch];
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last_ts[ch] = now;
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accumul[ch] = MAX(0, accumul[ch] + (30000 - delta));
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gpio_set_level(ch ? GPIO_LED_R_L : GPIO_LED_G_L, !accumul[ch]);
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}
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static inline void led_set_record(void)
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{
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gpio_set_level(GPIO_LED_B_L, 0);
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}
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static inline void led_reset_record(void)
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{
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gpio_set_level(GPIO_LED_B_L, 1);
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}
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/* USB descriptors */
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const struct usb_interface_descriptor USB_IFACE_DESC(USB_IFACE_VENDOR) = {
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.bLength = USB_DT_INTERFACE_SIZE,
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.bDescriptorType = USB_DT_INTERFACE,
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.bInterfaceNumber = USB_IFACE_VENDOR,
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.bAlternateSetting = 0,
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.bNumEndpoints = 1,
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.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
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.bInterfaceSubClass = USB_CLASS_VENDOR_SPEC,
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.bInterfaceProtocol = 0,
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.iInterface = USB_STR_SNIFFER,
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};
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const struct usb_endpoint_descriptor USB_EP_DESC(USB_IFACE_VENDOR,
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USB_EP_SNIFFER) = {
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.bLength = USB_DT_ENDPOINT_SIZE,
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.bDescriptorType = USB_DT_ENDPOINT,
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.bEndpointAddress = 0x80 | USB_EP_SNIFFER,
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.bmAttributes = 0x02 /* Bulk IN */,
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.wMaxPacketSize = USB_MAX_PACKET_SIZE,
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.bInterval = 1
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};
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/* USB callbacks */
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static void ep_tx(void)
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{
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static int b; /* current buffer index */
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if (btable_ep[USB_EP_SNIFFER].tx_count) {
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/* we have transmitted the previous buffer, toggle it */
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free_usb |= 1 << b;
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b = b ? 0 : 1;
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btable_ep[USB_EP_SNIFFER].tx_addr = usb_sram_addr(ep_buf[b]);
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}
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/* re-enable data transmission if we have available data */
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btable_ep[USB_EP_SNIFFER].tx_count = (free_usb & (1<<b)) ? 0
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: EP_BUF_SIZE;
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STM32_TOGGLE_EP(USB_EP_SNIFFER, EP_TX_MASK, EP_TX_VALID, 0);
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/* wake up the processing */
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task_set_event(TASK_ID_SNIFFER, USB_EVENT, 0);
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}
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static void ep_event(enum usb_ep_event evt)
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{
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if (evt != USB_EVENT_RESET)
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return;
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/* Bulk IN endpoint */
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btable_ep[USB_EP_SNIFFER].tx_addr = usb_sram_addr(ep_buf[0]);
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btable_ep[USB_EP_SNIFFER].tx_count = EP_BUF_SIZE;
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STM32_USB_EP(USB_EP_SNIFFER) = (USB_EP_SNIFFER << 0) /*Endpoint Num*/ |
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(3 << 4) /* TX Valid */ |
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(0 << 9) /* Bulk EP */ |
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(0 << 12) /* RX Disabled */;
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}
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USB_DECLARE_EP(USB_EP_SNIFFER, ep_tx, ep_tx, ep_event);
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/* --- RX operation using comparator linked to timer --- */
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/* RX on CC1 is using COMP1 triggering TIM1 CH1 */
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#define TIM_RX1 1
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#define DMAC_TIM_RX1 STM32_DMAC_CH6
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#define TIM_RX1_CCR_IDX 1
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/* RX on CC1 is using COMP2 triggering TIM2 CH4 */
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#define TIM_RX2 2
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#define DMAC_TIM_RX2 STM32_DMAC_CH7
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#define TIM_RX2_CCR_IDX 4
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/* Clock divider for RX edges timings (2.4Mhz counter from 48Mhz clock) */
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#define RX_CLOCK_DIV (20 - 1)
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static const struct dma_option dma_tim_cc1 = {
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DMAC_TIM_RX1, (void *)&STM32_TIM_CCRx(TIM_RX1, TIM_RX1_CCR_IDX),
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STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |
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STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
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};
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static const struct dma_option dma_tim_cc2 = {
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DMAC_TIM_RX2, (void *)&STM32_TIM_CCRx(TIM_RX2, TIM_RX2_CCR_IDX),
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STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |
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STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
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};
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/* sequence number for sample buffers */
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static volatile uint32_t seq;
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/* Buffer overflow count */
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static uint32_t oflow;
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#define SNIFFER_CHANNEL_CC1 0
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#define SNIFFER_CHANNEL_CC2 1
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#define get_channel(b) (((b) >> 12) & 0x1)
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void tim_rx1_handler(uint32_t stat)
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{
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stm32_dma_regs_t *dma = STM32_DMA1_REGS;
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int idx = !(stat & STM32_DMA_ISR_HTIF(DMAC_TIM_RX1));
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uint32_t mask = idx ? 0xFF00 : 0x00FF;
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uint32_t next = idx ? 0x0001 : 0x0100;
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sample_tstamp[idx] = __hw_clock_source_read();
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sample_seq[idx] = ((seq++ << 3) & 0x0ff8) |
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(SNIFFER_CHANNEL_CC1<<12);
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if (filled_dma & next) {
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oflow++;
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sample_seq[idx] |= 0x8000;
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} else {
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led_set_record();
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}
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filled_dma |= mask;
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dma->ifcr = STM32_DMA_ISR_ALL(DMAC_TIM_RX1);
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led_set_activity(0);
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}
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void tim_rx2_handler(uint32_t stat)
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{
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stm32_dma_regs_t *dma = STM32_DMA1_REGS;
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int idx = !(stat & STM32_DMA_ISR_HTIF(DMAC_TIM_RX2));
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uint32_t mask = idx ? 0xFF000000 : 0x00FF0000;
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uint32_t next = idx ? 0x00010000 : 0x01000000;
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idx += 2;
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sample_tstamp[idx] = __hw_clock_source_read();
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sample_seq[idx] = ((seq++ << 3) & 0x0ff8) |
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(SNIFFER_CHANNEL_CC2<<12);
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if (filled_dma & next) {
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oflow++;
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sample_seq[idx] |= 0x8000;
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} else {
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led_set_record();
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}
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filled_dma |= mask;
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dma->ifcr = STM32_DMA_ISR_ALL(DMAC_TIM_RX2);
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led_set_activity(1);
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}
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void tim_dma_handler(void)
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{
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stm32_dma_regs_t *dma = STM32_DMA1_REGS;
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uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1)
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| STM32_DMA_ISR_TCIF(DMAC_TIM_RX1)
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| STM32_DMA_ISR_HTIF(DMAC_TIM_RX2)
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| STM32_DMA_ISR_TCIF(DMAC_TIM_RX2));
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if (stat & STM32_DMA_ISR_ALL(DMAC_TIM_RX2))
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tim_rx2_handler(stat);
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else
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tim_rx1_handler(stat);
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/* time to process the samples */
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task_set_event(TASK_ID_SNIFFER, USB_EVENT, 0);
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}
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DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_4_7, tim_dma_handler, 1);
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static void rx_timer_init(int tim_id, timer_ctlr_t *tim, int ch_idx, int up_idx)
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{
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int bit_idx = 8 * ((ch_idx - 1) % 2);
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/* --- set counter for RX timing : 2.4Mhz rate, free-running --- */
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__hw_timer_enable_clock(tim_id, 1);
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/* Timer configuration */
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tim->cr1 = 0x0004;
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tim->cr2 = 0x0000;
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/* Auto-reload value : 8-bit free running counter */
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tim->arr = 0xFF;
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/* Counter reloading event after 106us */
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tim->ccr[1] = 0xFF;
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/* Timer ICx input configuration */
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if (ch_idx <= 2)
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tim->ccmr1 = 1 << bit_idx;
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else
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tim->ccmr2 = 1 << bit_idx;
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tim->ccer = 0xB << ((ch_idx - 1) * 4);
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/* TODO: add input filtering */
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/* configure DMA request on CCRx update and overflow/update event */
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tim->dier = (1 << (8 + ch_idx)) | (1 << (8 + up_idx));
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/* set prescaler to /26 (F=2.4Mhz, T=0.4us) */
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tim->psc = RX_CLOCK_DIV;
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/* Reload the pre-scaler and reset the counter, clear CCRx */
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tim->egr = 0x001F;
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/* clear update event from reloading */
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tim->sr = 0;
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}
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void sniffer_init(void)
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{
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/* remap TIM1 CH1/2/3 to DMA channel 6 */
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STM32_SYSCFG_CFGR1 |= BIT(28);
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/* TIM1 CH1 for CC1 RX */
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rx_timer_init(TIM_RX1, (void *)STM32_TIM_BASE(TIM_RX1),
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TIM_RX1_CCR_IDX, 2);
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/* TIM3 CH4 for CC2 RX */
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rx_timer_init(TIM_RX2, (void *)STM32_TIM_BASE(TIM_RX2),
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TIM_RX2_CCR_IDX, 2);
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/* turn on COMP/SYSCFG */
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STM32_RCC_APB2ENR |= BIT(0);
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STM32_COMP_CSR = STM32_COMP_CMP1EN | STM32_COMP_CMP1MODE_HSPEED |
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STM32_COMP_CMP1INSEL_VREF12 |
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STM32_COMP_CMP1OUTSEL_TIM1_IC1 |
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STM32_COMP_CMP1HYST_HI |
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STM32_COMP_CMP2EN | STM32_COMP_CMP2MODE_HSPEED |
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STM32_COMP_CMP2INSEL_VREF12 |
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STM32_COMP_CMP2OUTSEL_TIM2_IC4 |
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STM32_COMP_CMP2HYST_HI;
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/* start sampling the edges on the CC lines using the RX timers */
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dma_start_rx(&dma_tim_cc1, RX_COUNT, samples[0]);
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dma_start_rx(&dma_tim_cc2, RX_COUNT, samples[1]);
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task_enable_irq(STM32_IRQ_DMA_CHANNEL_4_7);
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/* start RX timers on CC1 and CC2 */
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STM32_TIM_CR1(TIM_RX1) |= 1;
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STM32_TIM_CR1(TIM_RX2) |= 1;
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}
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DECLARE_HOOK(HOOK_INIT, sniffer_init, HOOK_PRIO_DEFAULT);
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/* state of the simple text tracer */
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extern int trace_mode;
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/* Task to post-process the samples and copy them the USB endpoint buffer */
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void sniffer_task(void)
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{
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int u = 0; /* current USB buffer index */
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int d = 0; /* current DMA buffer index */
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int off = 0; /* DMA buffer offset */
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while (1) {
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/* Wait for a new buffer of samples or a new USB free buffer */
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task_wait_event(-1);
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/* send the available samples over USB if we have a buffer*/
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while (filled_dma && free_usb) {
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while (!(filled_dma & BIT(d))) {
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d = (d + 1) & 31;
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off += EP_PAYLOAD_SIZE;
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if (off >= RX_COUNT)
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off = 0;
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}
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ep_buf[u][0] = sample_seq[d >> 3] | (d & 7);
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ep_buf[u][1] = sample_tstamp[d >> 3];
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memcpy_to_usbram(
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((void *)usb_sram_addr(ep_buf[u]
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+ (EP_PACKET_HEADER_SIZE>>1))),
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samples[d >> 4]+off,
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EP_PAYLOAD_SIZE);
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atomic_clear((uint32_t *)&free_usb, 1 << u);
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u = !u;
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atomic_clear(&filled_dma, 1 << d);
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}
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led_reset_record();
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if (trace_mode != TRACE_MODE_OFF) {
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uint8_t curr = recording_enable(0);
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trace_packets();
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recording_enable(curr);
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}
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}
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}
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int wait_packet(int pol, uint32_t min_edges, uint32_t timeout_us)
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{
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stm32_dma_chan_t *chan = dma_get_channel(pol ? DMAC_TIM_RX2
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: DMAC_TIM_RX1);
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uint32_t t0 = __hw_clock_source_read();
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uint32_t c0 = chan->cndtr;
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uint32_t t_gap = t0;
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uint32_t c_gap = c0;
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uint32_t total_edges = 0;
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while (1) {
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uint32_t t = __hw_clock_source_read();
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uint32_t c = chan->cndtr;
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if (t - t0 > timeout_us) /* Timeout */
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break;
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if (min_edges) { /* real packet detection */
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int nb = (int)c_gap - (int)c;
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if (nb < 0)
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nb = RX_COUNT - nb;
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if (nb > 3) { /* NOT IDLE */
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t_gap = t;
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c_gap = c;
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total_edges += nb;
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} else {
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if ((t - t_gap) > 20 &&
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(total_edges - (t - t0)/256) >= min_edges)
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/* real gap after the packet */
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break;
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}
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}
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}
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return (__hw_clock_source_read() - t0 > timeout_us);
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}
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uint8_t recording_enable(uint8_t new_mask)
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{
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uint8_t old_mask = channel_mask;
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uint8_t diff = channel_mask ^ new_mask;
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/* start/stop RX timers according to the channel mask */
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if (diff & 1) {
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if (new_mask & 1)
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STM32_TIM_CR1(TIM_RX1) |= 1;
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else
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STM32_TIM_CR1(TIM_RX1) &= ~1;
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}
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if (diff & 2) {
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if (new_mask & 2)
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STM32_TIM_CR1(TIM_RX2) |= 1;
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else
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STM32_TIM_CR1(TIM_RX2) &= ~1;
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}
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channel_mask = new_mask;
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return old_mask;
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}
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static void sniffer_sysjump(void)
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{
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/* Stop DMA before jumping to avoid memory corruption */
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recording_enable(0);
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}
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DECLARE_HOOK(HOOK_SYSJUMP, sniffer_sysjump, HOOK_PRIO_DEFAULT);
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static int command_sniffer(int argc, char **argv)
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{
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ccprintf("Seq number:%d Overflows: %d\n", seq, oflow);
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(sniffer, command_sniffer,
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"[]", "Buffering status");
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