180 lines
4.9 KiB
C
180 lines
4.9 KiB
C
/* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/*
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* Hardware timers driver.
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*
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* nRF51x has one fully functional hardware counter, but 4 stand-alone
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* capture/compare (CC) registers.
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*/
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#include "common.h"
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#include "console.h"
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#include "hooks.h"
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#include "hwtimer.h"
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#include "registers.h"
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#include "task.h"
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#include "util.h"
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#define CPUTS(outstr) cputs(CC_CLOCK, outstr)
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#define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ## args)
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#define CPRINTS(format, args...) cprints(CC_CLOCK, format, ## args)
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/*
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* capture/compare (CC) registers:
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* CC_INTERRUPT -- used to interrupt next clock event.
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* CC_CURRENT -- used to capture the current value.
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* CC_OVERFLOW -- used to detect overflow on virtual timer (not hardware).
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*/
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#define CC_INTERRUPT 0
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#define CC_CURRENT 1
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#define CC_OVERFLOW 2
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/* The nRF51 has 3 timers, use HWTIMER to specify which one is used here. */
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#define HWTIMER 0
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static uint32_t last_deadline; /* cache of event set */
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/*
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* The nRF51x timer cannot be set to a specified value (reset to zero only).
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* Thus, we have to use a variable "shift" to maintain the offset between the
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* hardware value and virtual clock value.
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*
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* Once __hw_clock_source_set(ts) is called, the shift will be like:
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*
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* virtual time ------------------------------------------------
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* <----------> ^
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* shift | ts
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* 0 | |
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* hardware v
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* counter time ------------------------------------------------
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*
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*
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* Below diagram shows what it is when overflow happens.
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*
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* | now | prev_read
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* v v
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* virtual time ------------------------------------------------
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* ----> <------
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* shift shift
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* |
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* hardware v
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* counter time ------------------------------------------------
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*
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*/
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static uint32_t shift;
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void __hw_clock_event_set(uint32_t deadline)
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{
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last_deadline = deadline;
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NRF51_TIMER_CC(HWTIMER, CC_INTERRUPT) = deadline - shift;
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/* enable interrupt */
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NRF51_TIMER_INTENSET(HWTIMER) =
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1 << NRF51_TIMER_COMPARE_BIT(CC_INTERRUPT);
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}
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uint32_t __hw_clock_event_get(void)
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{
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return last_deadline;
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}
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void __hw_clock_event_clear(void)
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{
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/* disable interrupt */
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NRF51_TIMER_INTENCLR(HWTIMER) =
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1 << NRF51_TIMER_COMPARE_BIT(CC_INTERRUPT);
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}
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uint32_t __hw_clock_source_read(void)
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{
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/* to capture the current value */
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NRF51_TIMER_CAPTURE(HWTIMER, CC_CURRENT) = 1;
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return NRF51_TIMER_CC(HWTIMER, CC_CURRENT) + shift;
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}
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void __hw_clock_source_set(uint32_t ts)
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{
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shift = ts;
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/* reset counter to zero */
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NRF51_TIMER_STOP(HWTIMER) = 1;
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NRF51_TIMER_CLEAR(HWTIMER) = 1;
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/* So that no interrupt until next __hw_clock_event_set() */
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NRF51_TIMER_CC(HWTIMER, CC_INTERRUPT) = ts - 1;
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/* Update the overflow point */
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NRF51_TIMER_CC(HWTIMER, CC_OVERFLOW) = 0 - shift;
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/* Start the timer again */
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NRF51_TIMER_START(HWTIMER) = 1;
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}
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/* Interrupt handler for timer */
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void timer_irq(void)
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{
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int overflow = 0;
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/* clear status */
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NRF51_TIMER_COMPARE(HWTIMER, CC_INTERRUPT) = 0;
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if (NRF51_TIMER_COMPARE(HWTIMER, CC_OVERFLOW)) {
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NRF51_TIMER_COMPARE(HWTIMER, CC_OVERFLOW) = 0;
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overflow = 1;
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}
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process_timers(overflow);
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}
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/* DECLARE_IRQ doesn't like the NRF51_PERID_TIMER(n) macro */
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BUILD_ASSERT(NRF51_PERID_TIMER(HWTIMER) == NRF51_PERID_TIMER0);
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DECLARE_IRQ(NRF51_PERID_TIMER0, timer_irq, 1);
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int __hw_clock_source_init(uint32_t start_t)
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{
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/* Start the high freq crystal oscillator */
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NRF51_CLOCK_HFCLKSTART = 1;
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/* TODO: check if the crystal oscillator is running (HFCLKSTAT) */
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/* 32-bit timer mode */
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NRF51_TIMER_MODE(HWTIMER) = NRF51_TIMER_MODE_TIMER;
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NRF51_TIMER_BITMODE(HWTIMER) = NRF51_TIMER_BITMODE_32;
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/*
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* The external crystal oscillator is 16MHz (HFCLK).
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* Set the prescaler to 16 so that the timer counter is increasing
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* every micro-second (us).
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*/
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NRF51_TIMER_PRESCALER(HWTIMER) = 4; /* actual value is 2**4 = 16 */
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/* Not to trigger interrupt until __hw_clock_event_set() is called. */
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NRF51_TIMER_CC(HWTIMER, CC_INTERRUPT) = 0xffffffff;
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/* Set to 0 so that the next overflow can trigger timer_irq(). */
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NRF51_TIMER_CC(HWTIMER, CC_OVERFLOW) = 0;
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NRF51_TIMER_INTENSET(HWTIMER) =
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1 << NRF51_TIMER_COMPARE_BIT(CC_OVERFLOW);
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/* Clear the timer counter */
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NRF51_TIMER_CLEAR(HWTIMER) = 1;
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/* Override the count with the start value now that counting has
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* started. */
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__hw_clock_source_set(start_t);
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/* Enable interrupt */
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task_enable_irq(NRF51_PERID_TIMER(HWTIMER));
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/* Start the timer */
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NRF51_TIMER_START(HWTIMER) = 1;
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return NRF51_PERID_TIMER(HWTIMER);
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}
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