69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Silergy SYV682x Type-C Power Path Controller */
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#ifndef __CROS_EC_SYV682X_H
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#define __CROS_EC_SYV682X_H
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/* I2C addresses */
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#define SYV682X_ADDR0_FLAGS 0x40
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#define SYV682X_ADDR1_FLAGS 0x41
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#define SYV682X_ADDR2_FLAGS 0x42
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#define SYV682x_ADDR3_FLAGS 0x43
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/* SYV682x register addresses */
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#define SYV682X_STATUS_REG 0x00
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#define SYV682X_CONTROL_1_REG 0x01
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#define SYV682X_CONTROL_2_REG 0x02
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#define SYV682X_CONTROL_3_REG 0x03
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#define SYV682X_CONTROL_4_REG 0x04
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/* Status Register */
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#define SYV682X_STATUS_VSAFE_5V BIT(1)
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#define SYV682X_STATUS_VSAFE_0V BIT(0)
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/* Control Register 1 */
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#define SYV682X_CONTROL_1_CH_SEL BIT(1)
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#define SYV682X_CONTROL_1_HV_DR BIT(2)
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#define SYV682X_CONTROL_1_PWR_ENB BIT(7)
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#define SYV682X_ILIM_MASK 0x18
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#define SYV682X_ILIM_BIT_SHIFT 3
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#define SYV682X_ILIM_1_25 0
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#define SYV682X_ILIM_1_75 1
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#define SYV682X_ILIM_2_25 2
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#define SYV682X_ILIM_3_30 3
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/* Control Register 2 */
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#define SYV682X_CONTROL_2_SDSG BIT(1)
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#define SYV682X_CONTROL_2_FDSG BIT(0)
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/* Control Register 3 */
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#define SYV682X_OVP_MASK 0x70
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#define SYV682X_OVP_BIT_SHIFT 4
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#define SYV682X_OVP_06_0 0
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#define SYV682X_OVP_08_0 1
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#define SYV682X_OVP_11_1 2
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#define SYV682X_OVP_12_1 3
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#define SYV682X_OVP_14_2 4
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#define SYV682X_OVP_17_9 5
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#define SYV682X_OVP_21_6 6
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#define SYV682X_OVP_23_7 7
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/* Control Register 4 */
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#define SYV682X_CONTROL_4_CC1_BPS BIT(7)
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#define SYV682X_CONTROL_4_CC2_BPS BIT(6)
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#define SYV682X_CONTROL_4_VCONN1 BIT(5)
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#define SYV682X_CONTROL_4_VCONN2 BIT(4)
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#define SYV682X_CONTROL_4_VBAT_OVP BIT(3)
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#define SYV682X_CONTROL_4_VCONN_OCP BIT(2)
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#define SYV682X_CONTROL_4_CC_FRS BIT(1)
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struct ppc_drv;
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extern const struct ppc_drv syv682x_drv;
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#endif /* defined(__CROS_EC_SYV682X_H) */
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