57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Driver header for Intel Burnside Bridge - Thunderbolt/USB/DisplayPort Retimer
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*/
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#ifndef __CROS_EC_BB_RETIMER_H
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#define __CROS_EC_BB_RETIMER_H
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#include "gpio.h"
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/* Burnside Bridge I2C Configuration Space */
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#define BB_RETIMER_REG_VENDOR_ID 0
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#define BB_RETIMER_VENDOR_ID 0x8086
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#define BB_RETIMER_REG_DEVICE_ID 1
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#define BB_RETIMER_DEVICE_ID 0x15EE
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/* Connection State Register Attributes */
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#define BB_RETIMER_REG_CONNECTION_STATE 4
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#define BB_RETIMER_DATA_CONNECTION_PRESENT BIT(0)
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#define BB_RETIMER_CONNECTION_ORIENTATION BIT(1)
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#define BB_RETIMER_ACTIVE_CABLE BIT(2)
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#define BB_RETIMER_USB_3_CONNECTION BIT(5)
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#define BB_RETIMER_USB_DATA_ROLE BIT(7)
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#define BB_RETIMER_DP_CONNECTION BIT(8)
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#define BB_RETIMER_DP_PIN_ASSIGNMENT BIT(10)
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#define BB_RETIMER_DEBUG_ACCESSORY_MODE BIT(12)
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#define BB_RETIMER_IRQ_HPD BIT(14)
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#define BB_RETIMER_HPD_LVL BIT(15)
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/* Describes a USB Retimer present in the system */
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struct bb_retimer {
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/* USB Retimer I2C port */
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const int i2c_port;
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/* USB Retimer I2C address */
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const int i2c_addr;
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/* NVM flag if shared with multiple BB-retimers */
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uint8_t shared_nvm;
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/* Retimer control GPIOs */
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enum gpio_signal usb_ls_en_gpio; /* Load switch enable */
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enum gpio_signal retimer_rst_gpio; /* Retimer reset */
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enum gpio_signal force_power_gpio; /* Force power (active/low) */
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};
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/*
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* USB Retimers in system, ordered by PD port #, defined at board-level
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* CONFIG_USB_PD_RETIMER_INTEL_BB need to be defind at board-level.
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*/
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extern struct bb_retimer bb_retimers[];
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#endif /* __CROS_EC_BB_RETIMER_H */
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