119 lines
3.9 KiB
C
119 lines
3.9 KiB
C
/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Fuzzer target config flags */
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#ifndef __FUZZ_FUZZ_CONFIG_H
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#define __FUZZ_FUZZ_CONFIG_H
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#ifdef TEST_FUZZ
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/* Disable hibernate: We never want to exit while fuzzing. */
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#undef CONFIG_HIBERNATE
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#ifdef TEST_CR50_FUZZ
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#define CONFIG_DCRYPTO
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#define CONFIG_PINWEAVER
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#define CONFIG_UPTO_SHA512
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#define SHA512_SUPPORT
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#define CONFIG_MALLOC
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/******************************************************************************/
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/* From chip/g/config_chip.h */
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#define CFG_FLASH_HALF (CONFIG_FLASH_SIZE >> 1)
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#define CFG_TOP_SIZE 0x3800
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#define CFG_TOP_A_OFF (CFG_FLASH_HALF - CFG_TOP_SIZE)
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#define CFG_TOP_B_OFF (CONFIG_FLASH_SIZE - CFG_TOP_SIZE)
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/******************************************************************************/
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/* From board/cr50/board.h */
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/* Non-volatile counter storage for U2F */
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#define CONFIG_CRC8
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#define CONFIG_FLASH_ERASED_VALUE32 (-1U)
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#define CONFIG_FLASH_LOG
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#define CONFIG_FLASH_LOG_BASE CONFIG_PROGRAM_MEMORY_BASE
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#define CONFIG_FLASH_LOG_SPACE 0x800
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#define CONFIG_FLASH_NVCTR_SIZE CONFIG_FLASH_BANK_SIZE
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#define CONFIG_FLASH_NVCTR_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \
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CFG_TOP_A_OFF)
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#define CONFIG_FLASH_NVCTR_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \
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CFG_TOP_B_OFF)
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/* We're using TOP_A for partition 0, TOP_B for partition 1 */
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#define CONFIG_FLASH_NVMEM
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/* Offset to start of NvMem area from base of flash */
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#define CONFIG_FLASH_NVMEM_OFFSET_A (CFG_TOP_A_OFF + CONFIG_FLASH_NVCTR_SIZE)
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#define CONFIG_FLASH_NVMEM_OFFSET_B (CFG_TOP_B_OFF + CONFIG_FLASH_NVCTR_SIZE)
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/* Address of start of Nvmem area */
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#define CONFIG_FLASH_NVMEM_BASE_A \
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(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_NVMEM_OFFSET_A)
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#define CONFIG_FLASH_NVMEM_BASE_B \
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(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_NVMEM_OFFSET_B)
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#define CONFIG_FLASH_NEW_NVMEM_BASE_A \
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(CONFIG_FLASH_NVMEM_BASE_A + CONFIG_FLASH_BANK_SIZE)
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#define CONFIG_FLASH_NEW_NVMEM_BASE_B \
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(CONFIG_FLASH_NVMEM_BASE_B + CONFIG_FLASH_BANK_SIZE)
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/* Size partition in NvMem */
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#define NVMEM_PARTITION_SIZE (CFG_TOP_SIZE - CONFIG_FLASH_NVCTR_SIZE)
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/* Size in bytes of NvMem area */
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#define CONFIG_FLASH_NVMEM_SIZE (NVMEM_PARTITION_SIZE * NVMEM_NUM_PARTITIONS)
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#define NEW_NVMEM_PARTITION_SIZE (NVMEM_PARTITION_SIZE - CONFIG_FLASH_BANK_SIZE)
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#define NEW_NVMEM_TOTAL_PAGES \
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(2 * NEW_NVMEM_PARTITION_SIZE / CONFIG_FLASH_BANK_SIZE)
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/* Enable <key, value> variable support. */
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#define CONFIG_FLASH_NVMEM_VARS
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#define NVMEM_CR50_SIZE 272
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#define CONFIG_FLASH_NVMEM_VARS_USER_SIZE NVMEM_CR50_SIZE
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#ifndef __ASSEMBLER__
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enum nvmem_users {
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NVMEM_TPM = 0,
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NVMEM_CR50,
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NVMEM_NUM_USERS
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};
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#endif
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#define NVMEM_TPM_SIZE \
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(sizeof(((nvmem_partition *)(0))->buffer) - NVMEM_CR50_SIZE)
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#define CONFIG_FLASH_NVMEM_VARS_USER_NUM NVMEM_CR50
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/******************************************************************************/
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#define CONFIG_SW_CRC
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#endif /* TEST_CR50_FUZZ */
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#ifdef TEST_HOST_COMMAND_FUZZ
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#undef CONFIG_HOSTCMD_DEBUG_MODE
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/* Defining this makes fuzzing slower, but exercises additional code paths. */
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#define FUZZ_HOSTCMD_VERBOSE
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#ifdef FUZZ_HOSTCMD_VERBOSE
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#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_PARAMS
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#else
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#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
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#endif /* ! FUZZ_HOSTCMD_VERBOSE */
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/* The following are for fpsensor host commands. */
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#define CONFIG_AES
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#define CONFIG_AES_GCM
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#define CONFIG_ROLLBACK_SECRET_SIZE 32
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#define CONFIG_SHA256
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#endif /* TEST_HOST_COMMAND_FUZZ */
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#if defined(TEST_USB_PD_FUZZ)
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_PORT_COUNT 2
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#define CONFIG_SHA256
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#define CONFIG_SW_CRC
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#endif /* TEST_USB_PD_FUZZ */
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#endif /* TEST_FUZZ */
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#endif /* __FUZZ_FUZZ_CONFIG_H */
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