353 lines
9.1 KiB
C
353 lines
9.1 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Hammer configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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#include "variants.h"
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/* TODO: Remove CONFIG_SYSTEM_UNLOCKED prior to building MP FW. */
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#define CONFIG_SYSTEM_UNLOCKED
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/* TODO(b:63378217): Define FLASH_PSTATE_LOCKED prior to building MP FW. */
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#undef CONFIG_FLASH_PSTATE_LOCKED
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/*
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* Flash layout: we redefine the sections offsets and sizes as we want to
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* include a rollback region, and will use RO/RW regions of different sizes.
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*/
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#undef _IMAGE_SIZE
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#undef CONFIG_ROLLBACK_OFF
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#undef CONFIG_ROLLBACK_SIZE
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#undef CONFIG_FLASH_PSTATE
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#undef CONFIG_FW_PSTATE_SIZE
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#undef CONFIG_FW_PSTATE_OFF
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#undef CONFIG_SHAREDLIB_SIZE
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#undef CONFIG_RO_MEM_OFF
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#undef CONFIG_RO_STORAGE_OFF
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#undef CONFIG_RO_SIZE
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#undef CONFIG_RW_MEM_OFF
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#undef CONFIG_RW_STORAGE_OFF
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#undef CONFIG_RW_SIZE
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#undef CONFIG_EC_PROTECTED_STORAGE_OFF
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#undef CONFIG_EC_PROTECTED_STORAGE_SIZE
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#undef CONFIG_EC_WRITABLE_STORAGE_OFF
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#undef CONFIG_EC_WRITABLE_STORAGE_SIZE
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#undef CONFIG_WP_STORAGE_OFF
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#undef CONFIG_WP_STORAGE_SIZE
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#define CONFIG_FLASH_PSTATE
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/* Do not use a dedicated PSTATE bank */
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#undef CONFIG_FLASH_PSTATE_BANK
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#define CONFIG_SHAREDLIB_SIZE 0
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#define CONFIG_RO_MEM_OFF 0
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#define CONFIG_RO_STORAGE_OFF 0
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#define CONFIG_RO_SIZE (44*1024)
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/* EC rollback protection block */
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#define CONFIG_ROLLBACK_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE)
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#define CONFIG_ROLLBACK_SIZE CONFIG_FLASH_BANK_SIZE
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#define CONFIG_RW_MEM_OFF (CONFIG_ROLLBACK_OFF + CONFIG_ROLLBACK_SIZE)
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#define CONFIG_RW_STORAGE_OFF 0
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#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE - \
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(CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF))
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#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF
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#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE
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#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
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#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE
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#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
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#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
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/* The UART console is on USART1 (PA9/PA10) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 1
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/* Optional features */
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/*
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* TODO(b:65697962): Reenable low-power-idle on wand without breaking EC-EC
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* communication
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*/
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#ifndef BOARD_WAND
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#define CONFIG_LOW_POWER_IDLE
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#endif
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#define CONFIG_LTO
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#define CONFIG_FORCE_CONSOLE_RESUME
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#define CONFIG_STM_HWTIMER32
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/* USB Configuration */
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#define CONFIG_USB
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#define CONFIG_STREAM_USB
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#define CONFIG_USB_UPDATE
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#undef CONFIG_UPDATE_PDU_SIZE
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#ifdef BOARD_WAND
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/* Wand does not have enough space to fit 4k PDU. */
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#define CONFIG_UPDATE_PDU_SIZE 2048
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#else
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#define CONFIG_UPDATE_PDU_SIZE 4096
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#endif
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#undef CONFIG_USB_MAXPOWER_MA
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#define CONFIG_USB_MAXPOWER_MA 100
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#define CONFIG_USB_REMOTE_WAKEUP
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#define CONFIG_USB_SUSPEND
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#define CONFIG_USB_SERIALNO
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/* Replaced at runtime (board_read_serial) by chip unique-id-based number. */
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#define DEFAULT_SERIALNO ""
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/* USB interface indexes (use define rather than enum to expand them) */
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#ifdef SECTION_IS_RW
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#define USB_IFACE_HID_KEYBOARD 0
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#define USB_IFACE_UPDATE 1
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#ifdef HAS_NO_TOUCHPAD
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#define USB_IFACE_COUNT 2
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#else /* !HAS_NO_TOUCHPAD */
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#define USB_IFACE_HID_TOUCHPAD 2
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/* Can be either I2C or SPI passthrough, depending on the board. */
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#define USB_IFACE_I2C_SPI 3
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#if defined(CONFIG_USB_ISOCHRONOUS)
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#define USB_IFACE_ST_TOUCHPAD 4
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#define USB_IFACE_COUNT 5
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#else /* !CONFIG_USB_ISOCHRONOUS */
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#define USB_IFACE_COUNT 4
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#endif /* CONFIG_USB_ISOCHRONOUS */
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#endif /* !HAS_NO_TOUCHPAD */
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#else /* !SECTION_IS_RW */
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#define USB_IFACE_UPDATE 0
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#define USB_IFACE_COUNT 1
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#endif /* SECTION_IS_RW */
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_UPDATE 1
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#ifdef SECTION_IS_RW
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#define USB_EP_HID_KEYBOARD 2
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#ifdef HAS_NO_TOUCHPAD
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#define USB_EP_COUNT 3
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#else /* !HAS_NO_TOUCHPAD */
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#define USB_EP_HID_TOUCHPAD 3
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/* Can be either I2C or SPI passthrough, depending on the board. */
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#define USB_EP_I2C_SPI 4
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#if defined(CONFIG_USB_ISOCHRONOUS)
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#define USB_EP_ST_TOUCHPAD 5
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#define USB_EP_ST_TOUCHPAD_INT 6
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#define USB_EP_COUNT 7
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#else /* !CONFIG_USB_ISOCHRONOUS */
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#define USB_EP_COUNT 5
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#endif /* CONFIG_USB_ISOCHRONOUS */
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#endif /* !HAS_NO_TOUCHPAD */
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#else /* !SECTION_IS_RW */
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#define USB_EP_COUNT 2
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#endif /* SECTION_IS_RW */
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/* Optional features */
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#define CONFIG_BOARD_PRE_INIT
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#define CONFIG_WATCHDOG_HELP
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/* No need to hibernate, remove console commands that are not very useful. */
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#undef CONFIG_HIBERNATE
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#undef CONFIG_CONSOLE_CHANNEL
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#undef CONFIG_CONSOLE_HISTORY
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#undef CONFIG_CMD_GETTIME
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#undef CONFIG_CMD_MD
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#undef CONFIG_CMD_RW
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#undef CONFIG_CMD_SHMEM
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#undef CONFIG_CMD_TIMERINFO
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#undef CONFIG_CMD_WAITMS
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/*
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* Enlarge the allowed write / read count for trackpad debug
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* In the extended I2C reading over I2C ( >= 128 bytes ), the header size
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* have to be 6 bytes instead of 4 bytes for receiving packets. Moreover,
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* buffer size have to be power of two.
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*/
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#undef CONFIG_USB_I2C_MAX_WRITE_COUNT
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#define CONFIG_USB_I2C_MAX_WRITE_COUNT (128 - 4) /* 4 is maximum header size */
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#undef CONFIG_USB_I2C_MAX_READ_COUNT
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#define CONFIG_USB_I2C_MAX_READ_COUNT (1024 - 6) /* 6 is maximum header size */
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#define CONFIG_I2C_XFER_LARGE_READ
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/* No lid switch */
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#undef CONFIG_LID_SWITCH
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#ifdef SECTION_IS_RW
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#define CONFIG_USB_HID
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#define CONFIG_USB_HID_KEYBOARD
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#define CONFIG_USB_HID_KEYBOARD_BACKLIGHT
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#ifndef HAS_NO_TOUCHPAD
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#define CONFIG_USB_HID_TOUCHPAD
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/* Virtual address for touchpad FW in USB updater. */
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#define CONFIG_TOUCHPAD_VIRTUAL_OFF 0x80000000
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/* Include touchpad FW hashes in image */
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#define CONFIG_TOUCHPAD_HASH_FW
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#endif /* !HAS_NO_TOUCHPAD */
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#define CONFIG_KEYBOARD_DEBUG
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#undef CONFIG_KEYBOARD_BOOT_KEYS
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#undef CONFIG_KEYBOARD_RUNTIME_KEYS
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/* Keyboard output port list */
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#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C, GPIO_F
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#if defined(HAS_I2C_TOUCHPAD) || defined(CONFIG_LED_DRIVER_LM3630A)
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define I2C_PORT_MASTER 0
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#define I2C_PORT_KBLIGHT 0
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#define I2C_PORT_CHARGER 1
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#endif
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/* Enable PWM */
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#define CONFIG_PWM
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#ifdef CONFIG_HALL_SENSOR
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#define CONFIG_TABLET_MODE
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#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L
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#define CONFIG_KEYBOARD_TABLET_MODE_SWITCH
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#endif
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#ifdef HAS_SPI_TOUCHPAD
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/* Enable control of SPI over USB */
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#define CONFIG_USB_SPI
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#define CONFIG_SPI_MASTER
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#define CONFIG_SPI_HALFDUPLEX
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#define CONFIG_STM32_SPI1_MASTER
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#define CONFIG_SPI_TOUCHPAD_PORT 0
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#define SPI_ST_TP_DEVICE_ID 0
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/* Enable SPI master xfer command */
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#define CONFIG_CMD_SPI_XFER
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#define CONFIG_TOUCHPAD
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#define CONFIG_TOUCHPAD_ST
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#elif defined(HAS_I2C_TOUCHPAD) /* HAS_SPI_TOUCHPAD */
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/* Enable control of I2C over USB */
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#define CONFIG_USB_I2C
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#define USB_IFACE_I2C USB_IFACE_I2C_SPI
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#define USB_EP_I2C USB_EP_I2C_SPI
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/* Enable Elan touchpad driver */
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#define CONFIG_TOUCHPAD
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#define CONFIG_TOUCHPAD_ELAN
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#define CONFIG_TOUCHPAD_I2C_PORT I2C_PORT_MASTER
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#define CONFIG_TOUCHPAD_I2C_ADDR_FLAGS 0x15
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#endif /* HAS_I2C_TOUCHPAD */
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#define CONFIG_CURVE25519
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#define CONFIG_USB_PAIRING
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#define CONFIG_USB_CONSOLE_READ
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#ifdef BOARD_WAND
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/* Battery and charger options. */
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_INPUT_CURRENT 128
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#define CONFIG_CHARGER_ISL9238
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#define CONFIG_CHARGER_SENSE_RESISTOR 10
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_CHARGER_OTG
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#define CONFIG_CHARGE_RAMP_HW
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_SMART
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#define I2C_PORT_BATTERY I2C_PORT_CHARGER
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#define EC_EC_UART usart2_hw
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#define CONFIG_STREAM_USART2
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#define CONFIG_STREAM_USART
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#define CONFIG_EC_EC_COMM_SLAVE
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#define CONFIG_EC_EC_COMM_BATTERY
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#define CONFIG_CRC8
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#endif /* BOARD_WAND */
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#else /* SECTION_IS_RO */
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/* Sign and switch to RW partition on boot. */
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#define CONFIG_RWSIG
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#define CONFIG_RSA
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#define CONFIG_RSA_KEY_SIZE 3072
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#define CONFIG_RSA_EXPONENT_3
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#endif
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#define CONFIG_SHA256
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#ifdef SECTION_IS_RO
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#define CONFIG_SHA256_UNROLLED
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#endif
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#define CONFIG_RWSIG_TYPE_RWSIG
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/*
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* Add rollback protection, and independent RW region protection.
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*/
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#define CONFIG_ROLLBACK
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#define CONFIG_ROLLBACK_SECRET_SIZE 32
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#define CONFIG_ROLLBACK_SECRET_LOCAL_ENTROPY_SIZE 32
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#define CONFIG_FLASH_PROTECT_RW
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#ifdef SECTION_IS_RW
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#undef CONFIG_ROLLBACK_UPDATE
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#endif
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/* Maximum current to draw. */
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#define MAX_CURRENT_MA 2000
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/* Maximum current/voltage to provide over OTG. */
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#define MAX_OTG_CURRENT_MA 2000
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#define MAX_OTG_VOLTAGE_MV 20000
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#define TIM_WATCHDOG 16
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#define TIM_KBLIGHT 17
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#include "gpio_signal.h"
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_SERIALNO,
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USB_STR_VERSION,
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USB_STR_I2C_NAME,
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USB_STR_UPDATE_NAME,
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#ifdef CONFIG_USB_ISOCHRONOUS
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USB_STR_HEATMAP_NAME,
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#endif
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USB_STR_COUNT
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};
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#ifdef SECTION_IS_RW
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enum pwm_channel {
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PWM_CH_KBLIGHT = 0,
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/* Number of PWM channels */
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PWM_CH_COUNT
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};
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enum adc_channel {
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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#endif
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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