159 lines
3.6 KiB
C
159 lines
3.6 KiB
C
/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "adc.h"
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#include "adc_chip.h"
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#include "common.h"
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#include "console.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "registers.h"
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#include "task.h"
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#include "timer.h"
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#include "util.h"
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#include "tfdp_chip.h"
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/*
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* Conversion on a single channel takes less than 12 ms. Set timeout to
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* 15 ms so that we have a 3-ms margin.
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*/
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#define ADC_SINGLE_READ_TIME 15000
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struct mutex adc_lock;
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/*
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* Volatile should not be needed.
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* ADC ISR only reads task_waiting.
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* Two other non-ISR routines only write task_waiting when
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* interrupt is disabled or before starting ADC.
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*/
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static task_id_t task_waiting;
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/*
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* Start ADC single-shot conversion.
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* 1. Disable ADC interrupt.
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* 2. Clear sticky hardware status.
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* 3. Start conversion.
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* 4. Enable interrupt.
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* 5. Wait with timeout for ADC ISR to
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* to set TASK_EVENT_TIMER.
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*/
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static int start_single_and_wait(int timeout)
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{
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int event;
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MCHP_INT_DISABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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task_waiting = task_get_current();
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/* clear all R/W1C channel status */
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MCHP_ADC_STS = 0xffffu;
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/* clear R/W1C single done status */
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MCHP_ADC_CTRL |= BIT(7);
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/* clear GIRQ single status */
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MCHP_INT_SOURCE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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/* make sure all writes are issued before starting conversion */
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asm volatile ("dsb");
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/* Start conversion */
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MCHP_ADC_CTRL |= BIT(1);
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MCHP_INT_ENABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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/* Wait for interrupt, ISR disables interrupt */
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event = task_wait_event(timeout);
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task_waiting = TASK_ID_INVALID;
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return event != TASK_EVENT_TIMER;
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}
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int adc_read_channel(enum adc_channel ch)
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{
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const struct adc_t *adc = adc_channels + ch;
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int value;
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mutex_lock(&adc_lock);
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MCHP_ADC_SINGLE = 1 << adc->channel;
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if (start_single_and_wait(ADC_SINGLE_READ_TIME))
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value = (MCHP_ADC_READ(adc->channel) * adc->factor_mul) /
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adc->factor_div + adc->shift;
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else
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value = ADC_READ_ERROR;
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mutex_unlock(&adc_lock);
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return value;
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}
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int adc_read_all_channels(int *data)
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{
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int i;
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int ret = EC_SUCCESS;
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const struct adc_t *adc;
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mutex_lock(&adc_lock);
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MCHP_ADC_SINGLE = 0;
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for (i = 0; i < ADC_CH_COUNT; ++i)
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MCHP_ADC_SINGLE |= 1 << adc_channels[i].channel;
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if (!start_single_and_wait(ADC_SINGLE_READ_TIME * ADC_CH_COUNT)) {
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ret = EC_ERROR_TIMEOUT;
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goto exit_all_channels;
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}
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for (i = 0; i < ADC_CH_COUNT; ++i) {
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adc = adc_channels + i;
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data[i] = (MCHP_ADC_READ(adc->channel) * adc->factor_mul) /
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adc->factor_div + adc->shift;
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}
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exit_all_channels:
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mutex_unlock(&adc_lock);
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return ret;
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}
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/*
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* Enable GPIO pins.
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* Using MEC17xx direct mode interrupts. Do not
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* set Interrupt Aggregator Block Enable bit
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* for GIRQ containing ADC.
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*/
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static void adc_init(void)
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{
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trace0(0, ADC, 0, "adc_init");
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gpio_config_module(MODULE_ADC, 1);
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/* clear ADC sleep enable */
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MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_ADC);
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/* Activate ADC module */
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MCHP_ADC_CTRL |= BIT(0);
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/* Enable interrupt */
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task_waiting = TASK_ID_INVALID;
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MCHP_INT_ENABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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task_enable_irq(MCHP_IRQ_ADC_SNGL);
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}
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DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_INIT_ADC);
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void adc_interrupt(void)
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{
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MCHP_INT_DISABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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/* clear individual chan conversion status */
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MCHP_ADC_STS = 0xffffu;
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/* Clear interrupt status bit */
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MCHP_ADC_CTRL |= BIT(7);
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MCHP_INT_SOURCE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT;
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if (task_waiting != TASK_ID_INVALID)
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task_wake(task_waiting);
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}
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DECLARE_IRQ(MCHP_IRQ_ADC_SNGL, adc_interrupt, 2);
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