134 lines
3.4 KiB
C
134 lines
3.4 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* LIS2DH/LIS2DE/LNG2DM accelerometer module for Chrome EC */
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#ifndef __CROS_EC_ACCEL_LIS2DH_H
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#define __CROS_EC_ACCEL_LIS2DH_H
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#include "driver/stm_mems_common.h"
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/*
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* LIS2DH/LIS2DE:
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*
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* 7-bit address is 0011 00X b. Where 'X' is determined
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* by the voltage on the ADDR pin
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*/
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#define LIS2DH_ADDR0_FLAGS 0x18
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#define LIS2DH_ADDR1_FLAGS 0x19
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/*
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* LNG2DM:
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*
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* 8-bit address is 0101 00XW b. Where 'X' is determined
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* by the voltage on the ADDR pin, and 'W' is read write bit
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*/
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#define LNG2DM_ADDR0_FLAGS 0x28
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#define LNG2DM_ADDR1_FLAGS 0x29
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/* Who Am I */
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#define LIS2DH_WHO_AM_I_REG 0x0f
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#define LIS2DH_WHO_AM_I 0x33
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/* COMMON DEFINE FOR ACCEL SENSOR */
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#define LIS2DH_EN_BIT 0x01
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#define LIS2DH_DIS_BIT 0x00
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#define LIS2DH_INT2_ON_INT1_ADDR 0x13
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#define LIS2DH_INT2_ON_INT1_MASK 0x20
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#define LIS2DH_OUT_X_L_ADDR 0x28
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#define LIS2DH_CTRL1_ADDR 0x20
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#define LIS2DH_INT2_ON_INT1_MASK 0x20
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#define LIS2DH_ENABLE_ALL_AXES 0x07
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#define LIS2DH_CTRL2_ADDR 0x21
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#define LIS2DH_CTRL2_RESET_VAL 0x00
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#define LIS2DH_CTRL3_ADDR 0x22
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#define LIS2DH_CTRL3_RESET_VAL 0x00
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#define LIS2DH_CTRL4_ADDR 0x23
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#define LIS2DH_BDU_MASK 0x80
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#define LIS2DH_CTRL5_ADDR 0x24
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#define LIS2DH_CTRL5_RESET_VAL 0x00
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#define LIS2DH_CTRL6_ADDR 0x25
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#define LIS2DH_CTRL6_RESET_VAL 0x00
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#define LIS2DH_STATUS_REG 0x27
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#define LIS2DH_STS_XLDA_UP 0x80
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#define LIS2DH_FS_2G_VAL 0x00
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#define LIS2DH_FS_4G_VAL 0x01
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#define LIS2DH_FS_8G_VAL 0x02
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#define LIS2DH_FS_16G_VAL 0x03
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/* Interrupt source status register */
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#define LIS2DH_INT1_SRC_REG 0x31
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/* Output data rate Mask register */
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#define LIS2DH_ACC_ODR_MASK 0xf0
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/* Acc data rate */
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enum lis2dh_odr {
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LIS2DH_ODR_0HZ_VAL = 0,
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LIS2DH_ODR_1HZ_VAL,
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LIS2DH_ODR_10HZ_VAL,
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LIS2DH_ODR_25HZ_VAL,
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LIS2DH_ODR_50HZ_VAL,
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LIS2DH_ODR_100HZ_VAL,
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LIS2DH_ODR_200HZ_VAL,
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LIS2DH_ODR_400HZ_VAL,
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LIS2DH_ODR_LIST_NUM
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};
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/* Absolute maximum rate for sensor */
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#define LIS2DH_ODR_MIN_VAL 1000
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#define LIS2DH_ODR_MAX_VAL \
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MOTION_MAX_SENSOR_FREQUENCY(400000, 25000)
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/* Return ODR reg value based on data rate set */
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#define LIS2DH_ODR_TO_REG(_odr) \
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(_odr <= 1000) ? LIS2DH_ODR_1HZ_VAL : \
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(_odr <= 10000) ? LIS2DH_ODR_10HZ_VAL : \
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((31 - __builtin_clz(_odr / 25000))) + 3
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/* Return ODR real value normalized to sensor capabilities */
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#define LIS2DH_ODR_TO_NORMALIZE(_odr) \
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(_odr <= 1000) ? 1000 : (_odr <= 10000) ? 10000 : \
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(25000 * (1 << (31 - __builtin_clz(_odr / 25000))))
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/* Return ODR real value normalized to sensor capabilities from reg value */
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#define LIS2DH_REG_TO_NORMALIZE(_reg) \
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(_reg == LIS2DH_ODR_1HZ_VAL) ? 1000 : \
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(_reg == LIS2DH_ODR_10HZ_VAL) ? 10000 : (25000 * (1 << (_reg - 3)))
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/* Full scale range Mask register */
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#define LIS2DH_FS_MASK 0x30
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/* FS reg value from Full Scale */
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#define LIS2DH_FS_TO_REG(_fs) (__fls(_fs) - 1)
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/*
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* Sensor resolution in number of bits
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*
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* lis2dh has variable precision (8/10/12 bits) depending Power Mode
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* selected, here Only Normal Power mode supported (10 bits).
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*
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* lis2de/lng2dm only support 8bit resolution.
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*/
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#if defined(CONFIG_ACCEL_LIS2DE) || defined(CONFIG_ACCEL_LNG2DM)
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#define LIS2DH_RESOLUTION 8
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#elif defined(CONFIG_ACCEL_LIS2DH)
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#define LIS2DH_RESOLUTION 10
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#endif
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extern const struct accelgyro_drv lis2dh_drv;
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#endif /* __CROS_EC_ACCEL_LIS2DH_H */
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