275 lines
7.7 KiB
C
275 lines
7.7 KiB
C
/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_TOUCHPAD_ST_H
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#define __CROS_EC_TOUCHPAD_ST_H
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#include <stdint.h>
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#include "common.h"
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#define ST_VENDOR_ID 0x0483
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#define ST_TP_DUMMY_BYTE 1
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#define ST_TP_CMD_READ_ALL_EVENTS 0x87
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#define ST_TP_CMD_WRITE_SCAN_MODE_SELECT 0xA0
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#define ST_TP_CMD_WRITE_FEATURE_SELECT 0xA2
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#define ST_TP_CMD_WRITE_SYSTEM_COMMAND 0xA4
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#define ST_TP_CMD_WRITE_HOST_DATA_MEMORY 0xA6
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#define ST_TP_CMD_READ_HOST_DATA_MEMORY 0xA7
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#define ST_TP_CMD_WRITE_FW_CONFIG 0xA8
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#define ST_TP_CMD_READ_FW_CONFIG 0xA9
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#define ST_TP_CMD_SPI_HOST_BUFFER_ACK 0xC0
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#define ST_TP_CMD_READ_SPI_HOST_BUFFER 0xC1
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#define ST_TP_CMD_WRITE_HW_REG 0xFA
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#define ST_TP_CMD_READ_HW_REG 0xFB
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/* Max number of bytes that the DMA can burn on the flash in one shot in FTI */
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#define ST_TP_FLASH_BUFFER_SIZE (64 * 1024)
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/* Max number of bytes that can be written in I2C to the DMA */
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#define ST_TP_DMA_CHUNK_SIZE 32
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#define ST_HOST_BUFFER_DATA_VALID BIT(0)
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#define ST_HOST_BUFFER_MT_READY BIT(3)
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#define ST_HOST_BUFFER_SF_READY BIT(4)
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#define ST_HOST_BUFFER_SS_READY BIT(5)
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#define ST_TP_SCAN_MODE_ACTIVE 0x00
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#define ST_TP_SCAN_MODE_LOW_POWER 0x01
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#define ST_TP_SCAN_MODE_TUNING_WIZARD 0x02
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#define ST_TP_SCAN_MODE_LOCKED 0x03
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#define ST_TOUCH_ROWS (18) /* force len */
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#define ST_TOUCH_COLS (25) /* sense len */
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#define ST_TOUCH_HEADER_SIZE 32
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#define BYTES_PER_PIXEL 1
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/* Number of bits per pixel, this value is decided by experiments. */
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#define BITS_PER_PIXEL 8
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#define ST_TOUCH_FRAME_SIZE (ST_TOUCH_ROWS * ST_TOUCH_COLS * \
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BYTES_PER_PIXEL)
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#define ST_TOUCH_FORCE_SIZE (ST_TOUCH_ROWS * BYTES_PER_PIXEL)
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#define ST_TOUCH_SENSE_SIZE (ST_TOUCH_COLS * BYTES_PER_PIXEL)
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#define ST_TP_MEM_ID_SYSTEM_INFO 0x01
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#define ST_TP_FLASH_OFFSET_CODE (0x0000 << 2)
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#define ST_TP_FLASH_OFFSET_PANEL_CFG (0x6800 << 2)
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#define ST_TP_FLASH_OFFSET_CX (0x7000 << 2)
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#define ST_TP_FLASH_OFFSET_CONFIG (0x7C00 << 2)
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struct st_tp_host_data_header_t {
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#define ST_TP_HEADER_MAGIC 0xA5
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uint8_t magic; /* this should always be ST_TP_HEADER_MAGIC */
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uint8_t host_data_mem_id;
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uint16_t count;
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} __packed;
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/* Compute offset of end of a member in given type */
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#define endof(type, member) (offsetof(type, member) + \
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sizeof(((type *)NULL)->member))
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struct st_tp_system_info_t {
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/* Part 1, basic info */
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struct st_tp_host_data_header_t header;
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uint16_t api_ver_rev;
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uint8_t api_ver_minor;
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uint8_t api_ver_major;
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uint16_t chip0_ver;
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uint8_t chip0_id[2]; /* should be 0x3936 */
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uint16_t chip1_ver;
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uint16_t chip1_id;
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uint16_t fw_ver;
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uint16_t svn_rev;
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uint16_t cfg_ver;
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uint16_t cfg_project_id;
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uint16_t cx_ver;
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uint16_t cx_project_id;
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uint8_t cfg_afe_ver;
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uint8_t cx_afe_ver;
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uint8_t panel_cfg_afe_ver;
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uint8_t protocol;
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uint8_t die_id[16];
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uint64_t release_info; /* unsigned little endian 64 bit integer */
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uint32_t fw_crc;
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uint32_t cfg_crc;
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#define ST_TP_SYSTEM_INFO_PART_1_SIZE endof(struct st_tp_system_info_t, cfg_crc)
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#define ST_TP_SYSTEM_INFO_PART_1_RESERVED 16
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uint16_t scr_res_x;
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uint16_t scr_res_y;
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uint8_t scr_tx_len;
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uint8_t scr_rx_len;
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uint8_t key_len;
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uint8_t frc_len;
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#define ST_TP_SYSTEM_INFO_PART_2_SIZE (endof(struct st_tp_system_info_t, \
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frc_len) - \
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offsetof(struct st_tp_system_info_t, \
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scr_res_x))
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#define ST_TP_SYSTEM_INFO_PART_2_RESERVED 40
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#if 0 /* the following parts are defined in spec, but not currently used. */
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uint16_t dbg_frame_addr;
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#define ST_TP_SYSTEM_INFO_PART_3_SIZE (endof(struct st_tp_system_info_t, \
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dbg_frame_addr) - \
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offsetof(struct st_tp_system_info_t, \
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dbg_frame_addr))
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#define ST_TP_SYSTEM_INFO_PART_3_RESERVED 6
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uint16_t ms_scr_raw_addr;
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uint16_t ms_scr_filter_addr;
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uint16_t ms_scr_str_addr;
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uint16_t ms_scr_bl_addr;
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uint16_t ss_tch_tx_raw_addr;
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uint16_t ss_tch_tx_filter_addr;
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uint16_t ss_tch_tx_str_addr;
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uint16_t ss_tch_tx_bl_addr;
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uint16_t ss_tch_rx_raw_addr;
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uint16_t ss_tch_rx_filter_addr;
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uint16_t ss_tch_rx_str_addr;
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uint16_t ss_tch_rx_bl_addr;
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uint16_t key_raw_addr;
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uint16_t key_filter_addr;
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uint16_t key_str_addr;
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uint16_t key_bl_addr;
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uint16_t frc_raw_addr;
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uint16_t frc_filter_addr;
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uint16_t frc_str_addr;
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uint16_t frc_bl_addr;
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uint16_t ss_hvr_tx_raw_addr;
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uint16_t ss_hvr_tx_filter_addr;
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uint16_t ss_hvr_tx_str_addr;
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uint16_t ss_hvr_tx_bl_addr;
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uint16_t ss_hvr_rx_raw_addr;
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uint16_t ss_hvr_rx_filter_addr;
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uint16_t ss_hvr_rx_str_addr;
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uint16_t ss_hvr_rx_bl_addr;
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uint16_t ss_prx_tx_raw_addr;
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uint16_t ss_prx_tx_filter_addr;
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uint16_t ss_prx_tx_str_addr;
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uint16_t ss_prx_tx_bl_addr;
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uint16_t ss_prx_rx_raw_addr;
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uint16_t ss_prx_rx_filter_addr;
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uint16_t ss_prx_rx_str_addr;
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uint16_t ss_prx_rx_bl_addr;
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#define ST_TP_SYSTEM_INFO_PART_4_SIZE (endof(struct st_tp_system_info_t, \
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ss_prx_rx_bl_addr) - \
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offsetof(struct st_tp_system_info_t, \
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ms_scr_raw_addr))
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#endif /* if 0 */
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} __packed;
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#define ST_TP_SYSTEM_INFO_LEN (sizeof(struct st_tp_system_info_t) + \
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ST_TP_SYSTEM_INFO_PART_1_RESERVED)
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struct st_tp_host_buffer_header_t {
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#define ST_TP_BUFFER_HEADER_DATA_VALID BIT(0)
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#define ST_TP_BUFFER_HEADER_EVT_FIFO_NOT_EMPTY BIT(1)
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#define ST_TP_BUFFER_HEADER_SYS_FAULT BIT(2)
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#define ST_TP_BUFFER_HEADER_HEAT_MAP_MT_RDY BIT(3)
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#define ST_TP_BUFFER_HEADER_HEAT_MAP_SF_RDY BIT(4)
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#define ST_TP_BUFFER_HEADER_HEAT_MAP_SS_RDY BIT(5)
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#define ST_TP_BUFFER_HEADER_DOMESWITCH_LVL BIT(6)
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uint8_t flags;
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uint8_t reserved[3];
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uint8_t heatmap_miss_count;
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uint8_t event_count;
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uint8_t event_miss_count;
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} __packed;
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struct st_tp_host_buffer_heat_map_t {
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uint8_t frame[ST_TOUCH_FRAME_SIZE];
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#if 0 /* we are not using these now */
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uint8_t force[ST_TOUCH_FORCE_SIZE];
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uint8_t sense[ST_TOUCH_SENSE_SIZE];
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#endif
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} __packed;
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struct st_tp_event_t {
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#define ST_TP_EVENT_MAGIC 0x3
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unsigned magic:2; /* should always be 0x3 */
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unsigned major_high:2;
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#define ST_TP_EVENT_ID_CONTROLLER_READY 0x0
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#define ST_TP_EVENT_ID_ENTER_POINTER 0x1
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#define ST_TP_EVENT_ID_MOTION_POINTER 0x2
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#define ST_TP_EVENT_ID_LEAVE_POINTER 0x3
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#define ST_TP_EVENT_ID_STATUS_REPORT 0x4
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#define ST_TP_EVENT_ID_USER_REPORT 0x5
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#define ST_TP_EVENT_ID_DEBUG_REPORT 0xe
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#define ST_TP_EVENT_ID_ERROR_REPORT 0xf
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unsigned evt_id:4;
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union {
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struct {
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#define ST_TP_TOUCH_TYPE_INVALID 0x0
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#define ST_TP_TOUCH_TYPE_FINGER 0x1
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#define ST_TP_TOUCH_TYPE_GLOVE 0x2
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#define ST_TP_TOUCH_TYPE_STYLUS 0x3
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#define ST_TP_TOUCH_TYPE_PALM 0x4
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unsigned touch_type:4;
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unsigned touch_id:4;
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unsigned y:12;
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unsigned x:12;
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uint8_t z;
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uint8_t minor:4; // need to be concat with minor_high
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uint8_t major:4; // need to be concat with major_high
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} __packed finger;
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struct {
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#define ST_TP_STATUS_CMD_ECHO 0x1
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#define ST_TP_STATUS_FRAME_DROP 0x3
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#define ST_TP_STATUS_FCAL 0x5
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#define ST_TP_STATUS_BEACON 0x9
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uint8_t report_type;
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uint8_t info[4];
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uint8_t reserved;
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} __packed report;
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} __packed ; /* anonymous */
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unsigned minor_high:2;
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unsigned reserved:1;
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unsigned evt_left:5;
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} __packed;
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struct st_tp_fw_header_t {
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uint32_t signature;
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uint32_t ftb_ver;
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uint32_t chip_id;
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uint32_t svn_ver;
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uint32_t fw_ver;
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uint32_t config_id;
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uint32_t config_ver;
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uint8_t reserved[8];
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uint64_t release_info;
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uint32_t sec_size[4];
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uint32_t crc;
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} __packed;
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enum ST_TP_MODE {
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X_Y_MODE = 0,
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HEAT_MAP_MODE,
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};
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#define ST_TP_DEBUG_CMD_RESET_TOUCHPAD 0x00
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#define ST_TP_DEBUG_CMD_CALIBRATE 0x01
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#define ST_TP_DEBUG_CMD_START_SCAN 0x02
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#define ST_TP_DEBUG_CMD_STOP_SCAN 0x03
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#define ST_TP_DEBUG_CMD_READ_BUF_HEADER 0x04
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#define ST_TP_DEBUG_CMD_READ_EVENTS 0x05
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#define ST_TP_HEAT_MAP_THRESHOLD 10
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/* A minimum version that supports heatmap mode. */
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#define ST_TP_MIN_HEATMAP_VERSION 0x12
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#endif /* __CROS_EC_TOUCHPAD_ST_H */
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