279 lines
9.2 KiB
C
279 lines
9.2 KiB
C
/*
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* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef ECST_H
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#define ECST_H
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/*---------------------------------------------------------------------------
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Includes
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--------------------------------------------------------------------------*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include <curses.h>
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/*---------------------------------------------------------------------------
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Defines
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--------------------------------------------------------------------------*/
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/* For the beauty */
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#define TRUE 1
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#define FALSE 0
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/* CHANGEME when the version is updated */
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#define T_VER 1
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#define T_REV_MAJOR 0
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#define T_REV_MINOR 3
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/* Header starts by default at 0x20000 */
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#define FIRMWARE_OFFSET_FROM_HEADER 0x40
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#define ARM_FW_ENTRY_POINT_OFFSET 0x04
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/* Some useful offsets inside the header */
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#define HDR_ANCHOR_OFFSET 0
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#define HDR_EXTENDED_ANCHOR_OFFSET 4
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#define HDR_SPI_MAX_CLK_OFFSET 6
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#define HDR_SPI_READ_MODE_OFFSET 7
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#define HDR_ERR_DETECTION_CONF_OFFSET 8
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#define HDR_FW_LOAD_START_ADDR_OFFSET 9
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#define HDR_FW_ENTRY_POINT_OFFSET 13
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#define HDR_FW_ERR_DETECT_START_ADDR_OFFSET 17
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#define HDR_FW_ERR_DETECT_END_ADDR_OFFSET 21
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#define HDR_FW_LENGTH_OFFSET 25
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#define HDR_FLASH_SIZE_OFFSET 29
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#define HDR_RESERVED 30
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#define HDR_FW_HEADER_SIG_OFFSET 56
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#define HDR_FW_IMAGE_SIG_OFFSET 60
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#define FIRMW_CKSM_OFFSET 0x3C
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/* Header field known values */
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#define FW_HDR_ANCHOR 0x2A3B4D5E
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#define FW_HDR_EXT_ANCHOR_ENABLE 0xAB1E
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#define FW_HDR_EXT_ANCHOR_DISABLE 0x54E1
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#define FW_CRC_DISABLE 0x00
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#define FW_CRC_ENABLE 0x02
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#define HEADER_CRC_FIELDS_SIZE 8
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#define HDR_PTR_SIGNATURE 0x55AA650E
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#define CKSMCRC_INV_BIT_OFFSET 0x1
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/* Some common Sizes */
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#define STR_SIZE 200
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#define ARG_SIZE 100
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#define NAME_SIZE 160
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#define BUFF_SIZE 0x400
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#define HEADER_SIZE 64
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#define TMP_STR_SIZE 20
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#define PAD_VALUE 0x00
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#define MAX_ARGS 100
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/* Text Colors */
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#define TDBG 0x02 /* Dark Green */
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#define TPAS 0x0A /* light green */
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#define TINF 0x0B /* light turquise */
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#define TERR 0x0C /* light red */
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#define TUSG 0x0E /* light yellow */
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/* Indicates bin Command line parameters */
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#define BIN_FW_HDR_CRC_DISABLE 0x0001
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#define BIN_FW_CRC_DISABLE 0x0002
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#define BIN_FW_START 0x0004
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#define BIN_FW_SIZE 0x0008
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#define BIN_CK_FIRMWARE 0x0010
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#define BIN_FW_CKS_START 0x0020
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#define BIN_FW_CKS_SIZE 0x0040
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#define BIN_FW_CHANGE_SIG 0x0080
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#define BIN_FW_SPI_MAX_CLK 0x0100
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#define BIN_FW_LOAD_START_ADDR 0x0200
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#define BIN_FW_ENTRY_POINT 0x0400
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#define BIN_FW_LENGTH 0x0800
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#define BIN_FW_HDR_OFFSET 0x1000
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#define BIN_FW_USER_ARM_RESET 0x2000
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#define BIN_UNLIM_BURST_ENABLE 0x4000
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#define ECRP_OFFSET 0x01
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#define ECRP_INPUT_FILE 0x02
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#define ECRP_OUTPUT_FILE 0x04
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#define SPI_MAX_CLOCK_20_MHZ_VAL 20
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#define SPI_MAX_CLOCK_25_MHZ_VAL 25
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#define SPI_MAX_CLOCK_33_MHZ_VAL 33
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#define SPI_MAX_CLOCK_40_MHZ_VAL 40
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#define SPI_MAX_CLOCK_50_MHZ_VAL 50
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#define SPI_MAX_CLOCK_20_MHZ 0x00
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#define SPI_MAX_CLOCK_25_MHZ 0x01
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#define SPI_MAX_CLOCK_33_MHZ 0x02
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#define SPI_MAX_CLOCK_40_MHZ 0x03
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#define SPI_MAX_CLOCK_50_MHZ 0x04
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#define SPI_MAX_CLOCK_MASK 0xF8
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#define SPI_CLOCK_RATIO_1_VAL 1
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#define SPI_CLOCK_RATIO_2_VAL 2
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#define SPI_CLOCK_RATIO_1 0x07
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#define SPI_CLOCK_RATIO_2 0x08
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#define SPI_NORMAL_MODE_VAL "normal"
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#define SPI_SINGLE_MODE_VAL "fast"
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#define SPI_DUAL_MODE_VAL "dual"
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#define SPI_QUAD_MODE_VAL "quad"
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#define SPI_NORMAL_MODE 0x00
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#define SPI_SINGLE_MODE 0x01
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#define SPI_DUAL_MODE 0x03
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#define SPI_QUAD_MODE 0x04
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#define SPI_UNLIMITED_BURST_ENABLE 0x08
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#define FLASH_SIZE_1_MBYTES_VAL 1
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#define FLASH_SIZE_2_MBYTES_VAL 2
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#define FLASH_SIZE_4_MBYTES_VAL 4
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#define FLASH_SIZE_8_MBYTES_VAL 8
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#define FLASH_SIZE_16_MBYTES_VAL 16
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#define FLASH_SIZE_1_MBYTES 0x01
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#define FLASH_SIZE_2_MBYTES 0x03
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#define FLASH_SIZE_4_MBYTES 0x07
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#define FLASH_SIZE_8_MBYTES 0x0F
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#define FLASH_SIZE_16_MBYTES 0x1F
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/* Header fields default values. */
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#define SPI_MAX_CLOCK_DEFAULT SPI_MAX_CLOCK_20_MHZ_VAL
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#define SPI_READ_MODE_DEFAULT SPI_NORMAL_MODE
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#define FLASH_SIZE_DEFAULT FLASH_SIZE_16_MBYTES_VAL
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#define FW_CRC_START_ADDR 0x00000000
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#define ADDR_16_BYTES_ALIGNED_MASK 0x0000000F
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#define ADDR_4_BYTES_ALIGNED_MASK 0x00000003
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#define MAX_FLASH_SIZE 0x03ffffff
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/* Chips: convert from name to index. */
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#define NPCX5M5G 0
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#define NPCX5M6G 1
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#define NPCX7M5 2
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#define NPCX7M6 3
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#define NPCX7M7 4
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#define DEFAULT_CHIP NPCX5M5G
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#define NPCX5M5G_RAM_ADDR 0x100A8000
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#define NPCX5M5G_RAM_SIZE 0x20000
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#define NPCX5M6G_RAM_ADDR 0x10088000
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#define NPCX5M6G_RAM_SIZE 0x40000
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#define NPCX7M5X_RAM_ADDR 0x100A8000
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#define NPCX7M5X_RAM_SIZE 0x20000
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#define NPCX7M6X_RAM_ADDR 0x10090000
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#define NPCX7M6X_RAM_SIZE 0x40000
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#define NPCX7M7X_RAM_ADDR 0x10070000
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#define NPCX7M7X_RAM_SIZE 0x60000
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/*---------------------------------------------------------------------------
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Typedefs
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--------------------------------------------------------------------------*/
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/* Parameters for Binary manipulation */
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struct tbinparams {
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unsigned int anchor;
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unsigned short ext_anchor;
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unsigned char spi_max_clk;
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unsigned char spi_clk_ratio;
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unsigned char spi_read_mode;
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unsigned char err_detec_cnf;
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unsigned int fw_load_addr;
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unsigned int fw_ep;
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unsigned int fw_err_detec_s_addr;
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unsigned int fw_err_detec_e_addr;
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unsigned int fw_len;
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unsigned int flash_size;
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unsigned int hdr_crc;
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unsigned int fw_crc;
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unsigned int fw_hdr_offset;
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unsigned int bin_params;
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} bin_params_struct;
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enum verbose_level {
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NO_VERBOSE = 0,
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REGULAR_VERBOSE,
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SUPER_VERBOSE
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};
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enum calc_type {
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CALC_TYPE_NONE = 0,
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CALC_TYPE_CHECKSUM ,
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CALC_TYPE_CRC
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};
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struct chip_info {
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unsigned int ram_addr;
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unsigned int ram_size;
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} chip_info_struct;
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/*------------------------------------------------------------------------*/
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/* CRC Variable bit operation macros */
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/*------------------------------------------------------------------------*/
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#define NUM_OF_BYTES 32
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#define READ_VAR_BIT(var, nb) (((var) >> (nb)) & 0x1)
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#define SET_VAR_BIT(var, nb, val) ((var) |= ((val)<<(nb)))
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/*---------------------------------------------------------------------------
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Functions Declaration
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--------------------------------------------------------------------------*/
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/* main manipulation */
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int main_bin(struct tbinparams binary_parameters);
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int main_api(void);
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int main_hdr(void);
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/* General Checksum\CRC calculation */
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void init_calculation(unsigned int *check_sum_crc);
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void finalize_calculation(unsigned int *check_sum_crc);
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void update_calculation_information(unsigned char crc_con_dat);
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/* Checksum calculation etc. (BIN Specific) */
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int calc_header_crc_bin(unsigned int *pointer_header_checksum);
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int calc_firmware_csum_bin(unsigned int *p_cksum,
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unsigned int fw_offset,
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unsigned int fw_length);
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/* Checksum calculation etc. (ERP Specific) */
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int calc_erp_csum_bin(unsigned short *region_pointer_header_checksum,
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unsigned int region_pointer_ofs);
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/* No words - General */
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void exit_with_usage(void);
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int copy_file_to_file(char *dst_file_name,
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char *src_file_name,
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int offset,
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int origin);
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int write_to_file(unsigned int write_value,
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unsigned int offset,
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unsigned char num_of_bytes,
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char *print_string);
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int read_from_file(unsigned int offset,
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unsigned char size_to_read,
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unsigned int *read_value,
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char *print_string);
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/* Nice Particular Printf - General */
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__attribute__((__format__(__printf__, 2, 3)))
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void my_printf(int error_level, char *fmt, ...);
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int str_cmp_no_case(const char *s1, const char *s2);
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int get_file_length(FILE *stream);
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#endif /* ECST_H */
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